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SY100EP32VZG PDF预览

SY100EP32VZG

更新时间: 2024-09-30 08:56:59
品牌 Logo 应用领域
麦瑞 - MICREL /
页数 文件大小 规格书
9页 129K
描述
5V/3.3V ÷ 2 DIVIDER

SY100EP32VZG 数据手册

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®  
SY10EP32V
SY100EP32V  
®
Precision Edge  
5V/3.3V ÷ 2 DIVIDER  
FEATURES  
Guaranteed maximum frequency > 4GHz  
3.3V and 5V power supply options  
ECL Pro™  
Guaranteed propagation delay <440ps over  
temperature  
DESCRIPTION  
Internal 75Kinput pull-down resistors  
Wide operating temperature range: –40°C to +85°C  
Available in 8-pin MSOP and SOIC packages  
The SY10/100EP32V is an integrated ÷2 divider with  
differential clock inputs.  
The V  
pin, an internally generated voltage supply,  
BB  
is available to this device only. For single-ended input  
conditions, the unused differential input is connected to  
V
as a switching reference voltage. V may also rebias  
BB  
BB  
PIN NAMES  
AC-coupled inputs. When used, decouple V  
and V  
CC  
BB  
via a 0.01µF capacitor and limit current sourcing or sinking  
to 0.5mA. When not used, V should be left open.  
Pin  
CLK, /CLK  
Reset  
VBB  
Function  
ECL Clock Inputs  
BB  
The reset pin is asynchronous and is asserted on the  
rising edge. Upon power-up, the internal flip-flops will  
attain a random state; the reset allows for the  
synchronous use of multiple EP32’s in a system.  
The 100k series includes internal temperature  
compensation circuitry.  
ECL Asynchronous Reset  
Reference Voltage Output  
ECL Data Outputs  
Q, /Q  
(1)  
TRUTH TABLE  
CLK  
X
/CLK  
X
RESET  
Q
L
/Q  
H
Z
L
Z
/Z  
F
F
Note 1: Z = LOW-to-HIGH Transition  
/Z = HIGH-to-LOW Transition  
F = Divide by 2 function.  
ECL Pro is a trademarks of Micrel, Inc.  
Precision Edge is a registered trademarks of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-111605  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: September2005  

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