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SY100EP33VKITR PDF预览

SY100EP33VKITR

更新时间: 2024-09-30 05:04:27
品牌 Logo 应用领域
麦瑞 - MICREL 预分频器多谐振动器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
9页 88K
描述
5V/3.3V 4GHz, ± 4 PECL/LVPECL DIVIDER

SY100EP33VKITR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:MSOP包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.24
Is Samacsys:N其他特性:NECL MODE: VCC =0V, VEE =-3.3V TO -5.0V
系列:100EPJESD-30 代码:S-PDSO-G8
JESD-609代码:e0长度:3 mm
逻辑集成电路类型:MONOSTABLE MULTIVIBRATOR最大频率@ Nom-Sup:4000000000 Hz
湿度敏感等级:1数据/时钟输入次数:1
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:-4.5 V
最大电源电流(ICC):40 mA传播延迟(tpd):0.44 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Prescaler/Multivibrators最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mm最小 fmax:4000 MHz
Base Number Matches:1

SY100EP33VKITR 数据手册

 浏览型号SY100EP33VKITR的Datasheet PDF文件第2页浏览型号SY100EP33VKITR的Datasheet PDF文件第3页浏览型号SY100EP33VKITR的Datasheet PDF文件第4页浏览型号SY100EP33VKITR的Datasheet PDF文件第5页浏览型号SY100EP33VKITR的Datasheet PDF文件第6页浏览型号SY100EP33VKITR的Datasheet PDF文件第7页 
®
Precision Edge  
SY10EP33V
SY100EP33V  
5V/3.3V 4GHz,  
÷ 4 PECL/LVPECL DIVIDER  
FEATURES  
Guaranteed maximum frequency >4GHz  
3.3V and 5V power supply options  
ECL Pro™  
Guaranteed propagation delay <460ps over  
temperature  
DESCRIPTION  
Wide operating temperature range: –40°C to +85°C  
Available in 8-pin MSOP and SOIC packages  
The SY10/100EP33V is an integrated ÷4 divider.  
The V pin, an internally generated voltage supply,  
BB  
is available to this device only. For single-ended input  
conditions, the unused differential input is connected to  
V
as a switching reference voltage. V may also rebias  
BB  
BB  
AC-coupled inputs. When used, decouple V to V  
via  
CC  
BB  
a 0.01µF capacitor and limit current sourcing or sinking  
to 0.5mA. When not used, V should be left open.  
BB  
The reset pin is asynchronous and is asserted on the  
rising edge. Upon power-up, the internal flip-flops will  
attain a random state; the reset allows for the  
synchronous use of multiple EP33s in a system.  
The 100K Series includes internal temperature  
compensation circuitry.  
PIN NAMES  
Pin  
Function  
CLK, /CLK  
ECL Clock Inputs with Internal 75k  
Pull-Down Resistor, Default State is LOW  
RESET  
VBB  
ECL Asynchronous Reset  
Reference Voltage Output  
ECL Data Outputs  
Q, /Q  
(1)  
TRUTH TABLE  
CLK  
/CLK  
RESET  
Z(2)  
Q
L
/Q  
H
X
X
L
F
F
Notes:  
1. F = Divide by 4 function.  
2. Z = Low to High transition.  
ECL Pro are trademarks of Micrel, Inc.  
Precision Edge is a registered trademarks of Micrel, Inc.  
Rev.: E  
Amendment: /0  
M9999-071906  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: July 2006  

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