Datasheet > 逻辑 > 预分频器/多谐振动器> SY100EP33VKC

SY100EP33VKC

更新时间： 2024-09-30 03:00:15

品牌	Logo	应用领域
麦瑞 - MICREL		逻辑集成电路光电二极管时钟
页数	文件大小	规格书
9页	88K
描述
5V/3.3V 4GHz, ± 4 PECL/LVPECL DIVIDER

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SY100EP33VKC 数据手册

Precision Edge^®

SY10EP33V

Precision Edge

SY1^S0^YE¹P⁰⁰3^E3^PV^33V

SY100EP33V

Micrel, Inc.

5V/3.3V 4GHz,

÷ 4 PECL/LVPECL DIVIDER

FEATURES

ꢀ Guaranteed maximum frequency >4GHz

ꢀ 3.3V and 5V power supply options

ECL Pro™

ꢀ Guaranteed propagation delay <460ps over

temperature

DESCRIPTION

ꢀ Wide operating temperature range: –40°C to +85°C

ꢀ Available in 8-pin MSOP and SOIC packages

The SY10/100EP33V is an integrated ÷4 divider.

The V pin, an internally generated voltage supply,

is available to this device only. For single-ended input

conditions, the unused differential input is connected to

as a switching reference voltage. V may also rebias

AC-coupled inputs. When used, decouple V to V

via

a 0.01µF capacitor and limit current sourcing or sinking

to 0.5mA. When not used, V should be left open.

The reset pin is asynchronous and is asserted on the

rising edge. Upon power-up, the internal flip-flops will

attain a random state; the reset allows for the

synchronous use of multiple EP33s in a system.

The 100K Series includes internal temperature

compensation circuitry.

PIN NAMES

Function

CLK, /CLK

ECL Clock Inputs with Internal 75kΩ

Pull-Down Resistor, Default State is LOW

RESET

V_BB

ECL Asynchronous Reset

Reference Voltage Output

ECL Data Outputs

Q, /Q

(1)

TRUTH TABLE

CLK

/CLK

RESET

Z⁽²⁾

Notes:

1. F = Divide by 4 function.

2. Z = Low to High transition.

ECL Pro are trademarks of Micrel, Inc.

Precision Edge is a registered trademarks of Micrel, Inc.

Rev.: E

Amendment: /0

M9999-071906

hbwhelp@micrel.com or (408) 955-1690

Issue Date: July 2006

12 3 4 5 6 7...9

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