5秒后页面跳转
SY100EP14U_10 PDF预览

SY100EP14U_10

更新时间: 2024-11-05 08:56:59
品牌 Logo 应用领域
麦瑞 - MICREL 时钟驱动器输入元件
页数 文件大小 规格书
10页 1228K
描述
2.5V/3.3V/5V 1:5 LVPECL/PECL/ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX

SY100EP14U_10 数据手册

 浏览型号SY100EP14U_10的Datasheet PDF文件第2页浏览型号SY100EP14U_10的Datasheet PDF文件第3页浏览型号SY100EP14U_10的Datasheet PDF文件第4页浏览型号SY100EP14U_10的Datasheet PDF文件第5页浏览型号SY100EP14U_10的Datasheet PDF文件第6页浏览型号SY100EP14U_10的Datasheet PDF文件第7页 
2.5V/3.3V/5V 1:5 LVPECL/PECL/  
ECL/HSTL 2GHz CLOCK DRIVER  
WITH 2:1 DIFFERENTIAL INPUT MUX  
®
Precision Edge  
SY100EP14U  
FEATURES  
Guaranteed AC parameters over temp/voltage:  
ECL Pro™  
> 2GHz fMAX  
< 25ps within-device skew  
< 275ps tr/tf time  
< 525ps prop delay  
DESCRIPTION  
2:1 Differential MUX input  
The SY100EP14U is a high-speed, 2GHz differential  
PECL/ECL 1:5 fanout buffer optimized for ultra-low skew  
applications. Within device skew is guaranteed to be less  
than 25ps over temperature and supply voltage. The wide  
supply voltage operation allows this fanout buffer to operate  
Flexible supply voltage: 2.5V/3.3V/5V  
Wide operating temperature range: –40°C to +85°C  
V
BB  
reference for single-ended or AC-coupled  
PECL inputs  
in 2.5V, 3.3V, and 5V systems. A V reference is included  
BB  
100K ECL compatible outputs  
Inputs accept PECL/LVPECL/ECL/HSTL logic  
75kinternal input pull-down resistors  
Available in a 20-Pin TSSOP package  
for single-supply or AC-coupled PECL/ECL input  
applications, thus eliminating resistor networks. When  
interfacing to a single-ended or AC-coupled PECL/ECL input  
signal, connect the V  
pin to the unused /CLK pin, and  
BB  
bypass the pin to V through a 0.01µF capacitor.  
CC  
The SY100EP14U features a 2:1 input MUX, making it  
an ideal solution for redundant clock switchover applications.  
If only one input pair is used, the other pair may be left  
floating. In addition, this device includes a synchronous  
enable pin that forces the outputs into a fixed logic state.  
Enable or disable state is initiated only after the outputs are  
in a LOW state, thus eliminating the possibility of a “runt”  
clock pulse.  
The SY100EP14U I/O are fully differential and 100K ECL  
compatible. Differential 10K ECL logic can interface directly  
into the SY100EP14U inputs.  
The SY100EP14U is part of Micrel’s high-speed clock  
synchronization family. For applications that require a  
different I/O combination, consult the Micrel website at  
www.micrel.com, and choose from a comprehensive product  
line of high-speed, low-skew fanout buffers, translators, and  
clock generators.  
ECL Pro is a trademarks of Micrel, Inc.  
Precision Edge is a registered trademarks of Micrel, Inc.  
Rev.: G  
Amendment: /0  
M9999-060910  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: May 2010  

与SY100EP14U_10相关器件

型号 品牌 获取价格 描述 数据表
SY100EP14UK4C MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP14UK4CTR MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP14UK4G MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP14UK4GTR MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP14UK4I MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP14UK4ITR MICREL

获取价格

2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
SY100EP15V MICREL

获取价格

3.3V / 5V 2.5GHz PECL/ECL 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX
SY100EP15V MICROCHIP

获取价格

The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1
SY100EP15VK4C MICROCHIP

获取价格

100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
SY100EP15VK4C MICREL

获取价格

3.3V / 5V 2.5GHz PECL/ECL 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX