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SX48BD/TQ

更新时间： 2024-11-01 22:21:03
品牌 Logo 应用领域
其他 - ETC 闪存存储通信控制器
页数 文件大小 规格书
58页 829K
描述
Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug

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SX48BD/TQ 数据手册

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April, 2002  
SX48BD/SX52BD  
Configurable Communications Controllers with EE/Flash Program  
Memory, In-System Programming Capability, and On-Chip Debug  
1.0 PRODUCT OVERVIEW  
On-chip functions include two 16-bit timers with 8-bit  
prescalers supporting different operating modes (PWM,  
simultaneous PWM/capture, and external event counter),  
a general-purpose 8-bit timer with prescaler, an analog  
comparator, a brown-out detector, a watchdog timer, a  
power-save mode with multi-source wakeup capability,  
an internal R/C oscillator, user-selectable clock modes,  
and high-current outputs.  
1.1 Introduction  
The Ubicom SX48BD/SX52BD are members of the SX  
family of configurable communications controllers fabri-  
cated in an advanced CMOS process technology. The  
advanced process, combined with a RISC-based archi-  
tecture, allows high-speed computation, flexible I/O con-  
trol, and efficient data manipulation. Throughput is  
enhanced by operating the device at frequencies up to 75  
MHz and by optimizing the instruction set to include  
mostly single-cycle instructions. In addition, the SX archi-  
tecture is deterministic and totally reprogramable. The  
unique combination of these characteristics enables the  
device to implement hard real-time functions as software  
modules (Virtual Peripheral™) to replace traditional hard-  
ware functions.  
The SX48BD and SX52BD are functionally the same,  
except for the package type and pinout. The SX48BD  
has four fewer pins and has only four rather than eight  
I/O pins for Port A.  
RTCC  
OSC1  
OSC2  
WDT Clock  
OSC Driver  
Clock  
Select  
8
8-bit Watchdog  
Timer (WDT)  
8-bit Timer  
RTCC  
3
4MHz Internal  
RC OSC  
(divided by  
8 steps)  
Port B  
COMPARATOR  
Interrupt  
Stack  
System Clock  
4/8  
8
8
8
MCLR  
Prescaler for RTCC  
Interrupt  
Power-On  
Reset  
MIWU  
8
Port A Port C Port D Port E  
or  
RESET  
Postscaler for WDT  
8
8
8
8
8
Brown-Out  
System  
Clock  
MIWU  
Internal Data Bus  
8
8
8
8
8
Port C  
8
Port B  
16-Bit  
Timer 1  
Instruction  
Pipeline  
W
In-System  
Debugging  
PC  
8 Level  
Stack  
16-Bit  
Timer 2  
8
ALU  
FSR  
Address  
Fetch  
Data  
In-System  
Programming  
PC  
8-Bit  
Prescaler  
8-Bit  
Prescaler  
Decode  
Execute  
262 Bytes  
SRAM  
STATUS  
OPTION  
MODE  
4k Words  
EEPROM  
Address  
12  
Write Back  
Write Data  
8
8
Read Data  
Instruction  
12  
IREAD  
Figure 1-1. Block Diagram  
Ubicom™ and the Ubicom logo are trademarks of Ubicom, Inc.  
I2C™ is a trademark of Philips Corporation.  
All other trademarks mentioned in this document are property of their respec-  
tive companies.  
© 2002 Ubicom, Inc. All rights reserved.  
- 1 -  
www.ubicom.com  
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