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STM32F405ZGT6W

更新时间： 2024-11-09 17:33:23
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
185页 5432K
描述
带DSP和FPU的高性能基础系列ARM Cortex-M4 MCU，具有1 MB Flash、168 MHz CPU、ART加速器和FSMC

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STM32F405ZGT6W 数据手册

 浏览型号STM32F405ZGT6W的Datasheet PDF文件第2页浏览型号STM32F405ZGT6W的Datasheet PDF文件第3页浏览型号STM32F405ZGT6W的Datasheet PDF文件第4页浏览型号STM32F405ZGT6W的Datasheet PDF文件第5页浏览型号STM32F405ZGT6W的Datasheet PDF文件第6页浏览型号STM32F405ZGT6W的Datasheet PDF文件第7页 
STM32F405xx  
STM32F407xx  
ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB  
OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera  
Datasheet - production data  
IC/OC/PWM or pulse counter and quadrature  
(incremental) encoder input  
FBGA  
• Debug mode  
LQFP64 (10 × 10 mm)  
LQFP100 (14 × 14 mm)  
LQFP144 (20 × 20 mm)  
LQFP176 (24 × 24 mm)  
– Serial wire debug (SWD) & JTAG  
UFBGA176  
interfaces  
WLCSP90  
(10 × 10 mm)  
– Cortex-M4 Embedded Trace Macrocell™  
• Up to 140 I/O ports with interrupt capability  
– Up to 136 fast I/Os up to 84 MHz  
– Up to 138 5 V-tolerant I/Os  
Features  
• Core: ARM 32-bit Cortex™-M4 CPU with FPU,  
Adaptive real-time accelerator (ART  
Accelerator™) allowing 0-wait state execution  
from Flash memory, frequency up to 168 MHz,  
memory protection unit, 210 DMIPS/  
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP  
instructions  
• Up to 15 communication interfaces  
2
– Up to 3 × I C interfaces (SMBus/PMBus)  
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO  
7816 interface, LIN, IrDA, modem control)  
– Up to 3 SPIs (42 Mbits/s), 2 with muxed  
2
full-duplex I S to achieve audio class  
accuracy via internal audio PLL or external  
clock  
• Memories  
– Up to 1 Mbyte of Flash memory  
– 2 × CAN interfaces (2.0B Active)  
– SDIO interface  
– Up to 192+4 Kbytes of SRAM including 64-  
Kbyte of CCM (core coupled memory) data  
RAM  
– Flexible static memory controller  
supporting Compact Flash, SRAM,  
PSRAM, NOR and NAND memories  
• Advanced connectivity  
– USB 2.0 full-speed device/host/OTG  
controller with on-chip PHY  
– USB 2.0 high-speed/full-speed  
device/host/OTG controller with dedicated  
DMA, on-chip full-speed PHY and ULPI  
• LCD parallel interface, 8080/6800 modes  
• Clock, reset and supply management  
– 1.8 V to 3.6 V application supply and I/Os  
– POR, PDR, PVD and BOR  
– 10/100 Ethernet MAC with dedicated DMA:  
supports IEEE 1588v2 hardware, MII/RMII  
• 8- to 14-bit parallel camera interface up to  
– 4-to-26 MHz crystal oscillator  
54 Mbytes/s  
– Internal 16 MHz factory-trimmed RC (1%  
accuracy)  
– 32 kHz oscillator for RTC with calibration  
– Internal 32 kHz RC with calibration  
• True random number generator  
• CRC calculation unit  
• 96-bit unique ID  
• RTC: subsecond accuracy, hardware calendar  
•
Low power  
– Sleep, Stop and Standby modes  
Table 1. Device summary  
– V  
supply for RTC, 20×32 bit backup  
BAT  
Reference  
Part number  
registers + optional 4 KB backup SRAM  
• 3×12-bit, 2.4 MSPS A/D converters: up to 24  
channels and 7.2 MSPS in triple interleaved  
mode  
STM32F405RG, STM32F405VG, STM32F405ZG,  
STM32F405OG, STM32F405OE  
STM32F405xx  
STM32F407VG, STM32F407IG, STM32F407ZG,  
STM32F407VE, STM32F407ZE, STM32F407IE  
STM32F407xx  
• 2×12-bit D/A converters  
• General-purpose DMA: 16-stream DMA  
controller with FIFOs and burst support  
• Up to 17 timers: up to twelve 16-bit and two 32-  
bit timers up to 168 MHz, each with up to 4  
June 2013  
DocID022152 Rev 4  
1/185  
This is information on a product in full production.  
www.st.com  
1
 
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