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STM32F407VET6XXXTR PDF预览

STM32F407VET6XXXTR

更新时间: 2024-02-25 01:28:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器外围集成电路
页数 文件大小 规格书
167页 2187K
描述
IC,MICROCONTROLLER,32-BIT,CORTEX-M4 CPU,CMOS,QFP,100PIN,PLASTIC

STM32F407VET6XXXTR 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFP, QFP100,.63SQ,20Reach Compliance Code:compliant
风险等级:5.8具有ADC:YES
地址总线宽度:16位大小:32
CPU系列:CORTEX-M4最大时钟频率:168 MHz
DMA 通道:YES外部数据总线宽度:26
JESD-30 代码:S-PQFP-G100长度:14 mm
I/O 线路数量:82端子数量:100
片上程序ROM宽度:8最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:2/3.3 V
认证状态:Not QualifiedRAM(字节):196608
ROM(单词):1048576ROM可编程性:FLASH
速度:168 MHz子类别:Microcontrollers
最大压摆率:109 mA最大供电电压:3.6 V
最小供电电压:1.8 V标称供电电压:2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:14 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER, RISC
Base Number Matches:1

STM32F407VET6XXXTR 数据手册

 浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第2页浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第3页浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第4页浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第5页浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第6页浏览型号STM32F407VET6XXXTR的Datasheet PDF文件第7页 
STM32F405xx  
STM32F407xx  
ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM,  
USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera  
Features  
FBGA  
Core: ARM 32-bit Cortex™-M4 CPU with FPU,  
Adaptive real-time accelerator (ART  
Accelerator™) allowing 0-wait state execution  
from Flash memory, frequency up to 168 MHz,  
memory protection unit, 210 DMIPS/  
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP  
instructions  
LQFP64 (10 × 10 mm)  
LQFP100 (14 × 14 mm)  
LQFP144 (20 × 20 mm)  
LQFP176 (24 × 24 mm)  
UFBGA176  
WLCSP90  
(10 × 10 mm)  
Up to 140 I/O ports with interrupt capability  
– Up to 136 fast I/Os up to 84 MHz  
– Up to 138 5 V-tolerant I/Os  
Memories  
Up to 15 communication interfaces  
– Up to 1 Mbyte of Flash memory  
2
– Up to 3 × I C interfaces (SMBus/PMBus)  
– Up to 192+4 Kbytes of SRAM including 64-  
Kbyte of CCM (core coupled memory) data  
RAM  
– Flexible static memory controller  
supporting Compact Flash, SRAM,  
PSRAM, NOR and NAND memories  
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s,  
ISO 7816 interface, LIN, IrDA, modem  
control)  
– Up to 3 SPIs (37.5 Mbits/s), 2 with muxed  
2
full-duplex I S to achieve audio class  
accuracy via internal audio PLL or external  
LCD parallel interface, 8080/6800 modes  
clock  
Clock, reset and supply management  
– 1.8 V to 3.6 V application supply and I/Os  
– POR, PDR, PVD and BOR  
– 2 × CAN interfaces (2.0B Active)  
– SDIO interface  
Advanced connectivity  
– 4-to-26 MHz crystal oscillator  
– USB 2.0 full-speed device/host/OTG  
– Internal 16 MHz factory-trimmed RC (1%  
controller with on-chip PHY  
accuracy)  
– USB 2.0 high-speed/full-speed  
– 32 kHz oscillator for RTC with calibration  
– Internal 32 kHz RC with calibration  
device/host/OTG controller with dedicated  
DMA, on-chip full-speed PHY and ULPI  
Low power  
– Sleep, Stop and Standby modes  
– 10/100 Ethernet MAC with dedicated DMA:  
supports IEEE 1588v2 hardware, MII/RMII  
8- to 14-bit parallel camera interface up to  
– V  
supply for RTC, 20×32 bit backup  
BAT  
54 Mbytes/s  
registers + optional 4 KB backup SRAM  
3×12-bit, 2.4 MSPS A/D converters: up to 24  
channels and 7.2 MSPS in triple interleaved  
mode  
True random number generator  
CRC calculation unit  
96-bit unique ID  
2×12-bit D/A converters  
RTC: subsecond accuracy, hardware calendar  
General-purpose DMA: 16-stream DMA  
controller with FIFOs and burst support  
Table 1.  
Device summary  
Up to 17 timers: up to twelve 16-bit and two 32-  
bit timers up to 168 MHz, each with up to 4  
IC/OC/PWM or pulse counter and quadrature  
(incremental) encoder input  
Reference  
Part number  
STM32F405xx STM32F405RG, STM32F405VG, STM32F405ZG  
STM32F407VG, STM32F407IG, STM32F407ZG,  
STM32F407xx  
STM32F407VE, STM32F407ZE, STM32F407IE  
Debug mode  
– Serial wire debug (SWD) & JTAG interfaces  
– Cortex-M4 Embedded Trace Macrocell™  
1. The WLCSP90 package will soon be available.  
January 2012  
Doc ID 022152 Rev 2  
1/167  
www.st.com  
1
 

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