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STLVDS3486BDR PDF预览

STLVDS3486BDR

更新时间: 2024-11-16 20:36:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 光电二极管接口集成电路
页数 文件大小 规格书
15页 182K
描述
QUAD LINE RECEIVER, PDSO16, SO-16

STLVDS3486BDR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.26输入特性:DIFFERENTIAL
接口集成电路类型:LINE RECEIVER接口标准:EIA-644; TIA-644
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm湿度敏感等级:3
功能数量:4端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
最大输出低电流:0.008 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:3.3 ns
接收器位数:4座面最大高度:1.75 mm
子类别:Line Driver or Receivers最大压摆率:18 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

STLVDS3486BDR 数据手册

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STLVDS3486  
High speed differential line drivers  
Feature summary  
meets or exceeds the requirements of ansi  
TIA/EIA-644 standard  
Operates with a single 3.3V supply  
Designed for signaling rate up to 400Mbps  
Differential input thresholds ±100mV max  
Typical propagation delay time of 2.5ns  
TSSP  
Power dissipation 60mW typical per receiver at  
200MHz  
Low voltage TTL (LVTTL) logic output levels  
It also provdes a valid logical output state with a  
±100mV differential input voltge within the input  
common mode voltage range. The input common  
de voltage allows 1V of ground potential  
difference betwen two LVDS nodes.  
Pin compatible with the MC3486 and  
SN65LVD3486  
Open circuit fail safe  
ESD protection:  
7KV receiver pins  
3KV all pins vs gnd  
The intendd application of this device and  
signalltechnique is both point-to-point and  
multidrop data transmission over controlled  
impedance media approximately 100. The  
transmission media may be printed circuit board  
traces, backplanes or cables. The ultimate rate  
and distance of data transfer depend upon the  
attenuation characteristics of the media and noise  
coupling to the environment.  
Description  
The STLVDS3486, is a difrential line receiver  
that implements the ectrical characteristics of  
low voltage differential signaling (LVDS). This  
signaling techniue lowers the output voltage  
levels of 5V differential standad levels (such as  
TIA/EI422B) to reduce thpower, increase the  
switching speeds anallow operations with a  
3V supply rail. This differential receiver provides  
a valid logical otput state with a 3.3V supply rail.  
The STLVDS3486 version is characterized for  
operation from -40°C to 85°C.  
.
Order code  
Temperature  
Part number  
Package  
Comments  
Range  
STLVDS3486BTR  
April 2006  
-40 to 85 °C  
TSSOP16 (Tape & Reel)  
Rev. 4  
2500 parts per reel  
1/15  
www.st.com  
15  

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