Datasheet > STLVDS385

STLVDS385

更新时间： 2024-11-15 22:42:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		显示器光电二极管
页数	文件大小	规格书
14页	264K
描述
3.3V PROGRAMMABLE LVDS TRANSMITTER 24-BIT FLAT PANEL DISPLAY (FPD) LINK-85MHZ

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中文翻译

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数据手册

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STLVDS385 数据手册

STLVDS385

+3.3V PROGRAMMABLE LVDS TRANSMITTER 24-BIT

FLAT PANEL DISPLAY (FPD) LINK-85MHZ

■

20 TO 85 MHz SHIFT CLOCK SUPPORT

BEST–IN–CLASS SET & HOLD TIMES ON

TxINPUTs

■

Tx POWER CONSUMPTION <130 mW (typ)

@85MHz GRAYSCALE

■

Tx POWER-DOWN MODE <200µW (max)

SUPPORTS VGA, SVGA, XGA aND SINGLE/

DUAL PIXEL SXGA.

■

NARROW BUS REDUCES CABLE SIZE AND

TSSOP56

COST

■

UP TO 2.38 Gbps THROUGHPUT

UP TO 297.5 Megabytes/sec BANDWIDTH

345 mV (typ) SWING LVDS DEVICES FOR

LOW EMI

PLL REQUIRES NO EXTERNAL

COMPONENTS

link. Every cycle of the transmit clock 28 bits of

input data are sampled and transmitted. At a

transmit clock frequency of 85 MHz, 24 bits of

RGB data and 3 bits of LCD timing and control

data (FPLINE, FPFRAME, DRDY) are transmitted

at a rate of 595 Mbps per LVDS data channel.

Using a 85 MHz clock, the data throughput is

297.5 Mbytes/sec. The transmitter can be

programmed for Rising edge strobe or Falling

edge strobe through a dedicated pin. A Rising

edge or Falling edge strobe transmitter will inter

operate with a Falling edge strobe Receiver

without any translation logic.

■

COMPATIBLE WITH TIA/EIA -644 LVDS

STANDARD

DESCRIPTION

The STLVDS385 transmitter converts 28 bits of

LVCMOS/LVTTL data into four LVDS (Low

Voltage Differential Signaling) data streams. A

phase-locked transmit clock is transmitted in

parallel with the data streams over a fifth LVDS

ORDERING CODES

Temperature

Type

Package

TSSOP56 (Tape & Reel)

Comments

Range

STLVDS385BTR

-10 to 70°C

2000 parts per reel

February 2004

1/14

12 3 4 5 6 7...14

中文翻译

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STLVDS385BTR	STMICROELECTRONICS	获取价格	3.3V PROGRAMMABLE LVDS TRANSMITTER 24-BIT FLAT PANEL DISPLAY (FPD) LINK-85MHZ
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