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STLVDS385BTR PDF预览

STLVDS385BTR

更新时间: 2024-11-15 22:42:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 显示器光电二极管
页数 文件大小 规格书
14页 264K
描述
3.3V PROGRAMMABLE LVDS TRANSMITTER 24-BIT FLAT PANEL DISPLAY (FPD) LINK-85MHZ

STLVDS385BTR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.81差分输出:YES
驱动器位数:4输入特性:STANDARD
接口集成电路类型:LINE DRIVER接口标准:EIA-644; TIA-644
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:14 mm湿度敏感等级:3
功能数量:1端子数量:56
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
最大接收延迟:座面最大高度:1.2 mm
子类别:Other Interface ICs最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

STLVDS385BTR 数据手册

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STLVDS385  
+3.3V PROGRAMMABLE LVDS TRANSMITTER 24-BIT  
FLAT PANEL DISPLAY (FPD) LINK-85MHZ  
20 TO 85 MHz SHIFT CLOCK SUPPORT  
BEST–IN–CLASS SET & HOLD TIMES ON  
TxINPUTs  
Tx POWER CONSUMPTION <130 mW (typ)  
@85MHz GRAYSCALE  
Tx POWER-DOWN MODE <200µW (max)  
SUPPORTS VGA, SVGA, XGA aND SINGLE/  
DUAL PIXEL SXGA.  
NARROW BUS REDUCES CABLE SIZE AND  
TSSOP56  
COST  
UP TO 2.38 Gbps THROUGHPUT  
UP TO 297.5 Megabytes/sec BANDWIDTH  
345 mV (typ) SWING LVDS DEVICES FOR  
LOW EMI  
PLL REQUIRES NO EXTERNAL  
COMPONENTS  
link. Every cycle of the transmit clock 28 bits of  
input data are sampled and transmitted. At a  
transmit clock frequency of 85 MHz, 24 bits of  
RGB data and 3 bits of LCD timing and control  
data (FPLINE, FPFRAME, DRDY) are transmitted  
at a rate of 595 Mbps per LVDS data channel.  
Using a 85 MHz clock, the data throughput is  
297.5 Mbytes/sec. The transmitter can be  
programmed for Rising edge strobe or Falling  
edge strobe through a dedicated pin. A Rising  
edge or Falling edge strobe transmitter will inter  
operate with a Falling edge strobe Receiver  
without any translation logic.  
COMPATIBLE WITH TIA/EIA -644 LVDS  
STANDARD  
DESCRIPTION  
The STLVDS385 transmitter converts 28 bits of  
LVCMOS/LVTTL data into four LVDS (Low  
Voltage Differential Signaling) data streams. A  
phase-locked transmit clock is transmitted in  
parallel with the data streams over a fifth LVDS  
ORDERING CODES  
Temperature  
Type  
Package  
TSSOP56 (Tape & Reel)  
Comments  
Range  
STLVDS385BTR  
-10 to 70°C  
2000 parts per reel  
February 2004  
1/14  

STLVDS385BTR 替代型号

型号 品牌 替代类型 描述 数据表
DS90C383BMT/NOPB TI

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