STK15C88
32K x 8 AutoStore™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
DESCRIPTION
• Nonvolatile Storage without Battery Problems
The STK15C88 is a fast SRAM with a nonvolatile
element incorporated in each static memory cell.
The SRAM can be read and written an unlimited
number of times, while independent nonvolatile data
resides in nonvolatile elements. Data transfers from
the SRAM to the nonvolatile elements (the STORE
operation) can take place automatically on power
down using charge stored in system capacitance.
Transfers from the nonvolatile elements to the SRAM
(the RECALL operation) take place automatically on
restoration of power. Initiation of STORE and RECALL
cycles can also be controlled by entering specific
read sequences. The STK15C88 is pin-compatible
with 32k x 8 SRAMs and battery-backed SRAMs,
allowing direct substitution while enhancing perfor-
mance. A similar device (STK16C88) with an inter-
nally integrated capacitor is available for
applications with very fast power-down slew rates.
The STK14C88, which uses an external capacitor, is
another alternative for these applications.
• Directly Replaces 32K x 8 Static RAM, Battery-
Backed RAM or EEPROM
• 25ns, 35ns and 45ns Access Times
• STORE to nonvolatile elements Initiated by
Software or AutoStore™
• RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to nonvolatile ele-
ments
• 100-Year Data Retention in nonvolatile ele-
ments (Commercial/Industrial)
• Single 5V + 10% Operation
• Commercial and Industrial Temperatures
• 28-Pin PDIP and SOIC Packages
BLOCK DIAGRAM
PIN CONFIGURATIONS
A14
A12
A7
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
W
QUANTUM TRAP
V
512 x 512
3
4
5
6
7
8
9
A13
A8
CC
A6
A5
A5
A9
A6
STORE
A4
A11
G
A10
E
STORE/
RECALL
A7
POWER
A3
A8
STATIC RAM
ARRAY
CONTROL
A2
CONTROL
RECALL
A9
A1
A0
10
11
12
13
14
DQ7
DQ6
DQ5
DQ4
DQ3
A11
A12
A13
A14
512 x 512
28 - 300 PDIP
28 - 600 PDIP
28 - 300 SOIC
28 - 350 SOIC
DQ0
DQ1
DQ2
VSS
SOFTWARE
DETECT
A
- A
13
0
DQ
DQ
DQ
PIN NAMES
0
1
2
COLUMN I/O
A
- A
Address Inputs
0
14
COLUMN DEC
W
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+ 5V)
Ground
DQ
3
4
DQ
DQ - DQ
0
7
DQ
DQ
DQ
5
6
7
A
A A A
A A
1 4
2 3
10
0
E
G
G
E
W
V
V
CC
SS
September 2003
1
Document Control # ML0016 rev 0.1