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STK11C48-NF45I PDF预览

STK11C48-NF45I

更新时间: 2024-11-07 20:14:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 340K
描述
2KX8 NON-VOLATILE SRAM, 45ns, PDSO28, 0.300 INCH, PLASTIC, SOIC-28

STK11C48-NF45I 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.32
最长访问时间:45 nsJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:17.935 mm
内存密度:16384 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:28
字数:2048 words字数代码:2000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:2KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.64 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.505 mm
Base Number Matches:1

STK11C48-NF45I 数据手册

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STK11C48  
2K x 8 nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
Obsolete - Not Recommend for new Designs  
FEATURES  
DESCRIPTION  
• 25ns, 35ns and 45ns Access Times  
The Simtek STK11C48 is a fast static RAM with a  
nonvolatile element incorporated in each static  
memory cell. The SRAM can be read and written an  
unlimited number of times, while independent, non-  
volatile data resides in the Nonvolatile Elements.  
Data transfers from the SRAM to the Nonvolatile Ele-  
ments (the STORE operation), or from Nonvolatile  
Elements to SRAM (the RECALL operation), take  
place using a software sequence. Transfers from the  
Nonvolatile Elements to the SRAM (the RECALL  
operation) also take place automatically on restora-  
tion of power.  
STORE to Nonvolatile Elements Initiated by  
Software  
RECALL to SRAM Initiated by Software or  
Power Restore  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to Nonvolatile Ele-  
ments  
• 100-Year Data Retention in Nonvolatile Ele-  
ments  
• Commercial and Industrial Temperatures  
• 28-Pin 300 mil PDIP, 300 mil SOIC and  
350 mil SOIC Packages  
BLOCK DIAGRAM  
PIN CONFIGURATIONS  
1
NC  
NC  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC  
W
NC  
Quantum Trap  
32 x 512  
2
3
A
A
7
4
A
6
5
4
3
8
A5  
5
A
A
A
A
A
9
NC  
G
STORE  
STORE/  
RECALL  
CONTROL  
6
A6  
A7  
A8  
A9  
7
STATIC RAM  
ARRAY  
8
RECALL  
A
2
10  
9
A
E
1
0
32 x 512  
10  
11  
12  
13  
14  
A
DQ  
DQ  
7
6
5
DQ  
0
28 - 300 PDIP  
28 - 300 SOIC  
28 - 350 SOIC  
DQ  
DQ  
1
2
DQ  
DQ  
DQ  
4
3
SOFTWARE  
DETECT  
A0 - A10  
V
SS  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
COLUMN I/O  
PIN NAMES  
COLUMN DEC  
A
- A  
Address Inputs  
Write Enable  
Data In/Out  
Chip Enable  
Output Enable  
Power (+ 5V)  
Ground  
0
10  
W
A0 A1 A2 A3 A4 A10  
DQ - DQ  
0
G
7
E
E
G
W
V
V
CC  
SS  
March 2006  
1
Document Control # ML0003 rev 0.2  

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