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ST72F521R6T6/XXX PDF预览

ST72F521R6T6/XXX

更新时间: 2024-11-03 12:59:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存外围集成电路微控制器时钟
页数 文件大小 规格书
199页 1974K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,64PIN,PLASTIC

ST72F521R6T6/XXX 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
零件包装代码:QFP包装说明:LFQFP, QFP64,.6SQ,32
针数:64Reach Compliance Code:compliant
风险等级:5.8具有ADC:YES
地址总线宽度:位大小:8
CPU系列:ST72最大时钟频率:16 MHz
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-PQFP-G64长度:10 mm
I/O 线路数量:48端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.6SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
电源:3.3/5 V认证状态:Not Qualified
RAM(字节):1024ROM(单词):32768
ROM可编程性:FLASH速度:8 MHz
子类别:Microcontrollers最大压摆率:8 mA
最大供电电压:5.5 V最小供电电压:3.8 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

ST72F521R6T6/XXX 数据手册

 浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第2页浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第3页浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第4页浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第5页浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第6页浏览型号ST72F521R6T6/XXX的Datasheet PDF文件第7页 
ST72521M/R/AR  
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,  
2
FIVE TIMERS, SPI, SCI, I C, CAN INTERFACE  
Memories  
– 32K to 60K dual voltage High Density Flash  
(HDFlash) or ROM with read-out protection  
capability. In-Application Programming and  
In-Circuit Programming for HDFlash devices  
– 1K to 2K RAM  
– HDFlash endurance: 100 cycles, data reten-  
tion: 20 years at 55°C  
Clock, Reset And Supply Management  
TQFP64  
14 x 14  
– Enhanced low voltage supervisor (LVD) for  
main supply and auxiliary voltage detector  
(AVD) with interrupt capability  
TQFP64  
10 x 10  
TQFP80  
14 x 14  
– Clock sources: crystal/ceramic resonator os-  
cillators, internal or external RC oscillator,  
clock security system and bypass for external  
clock  
– PLL for 2x frequency multiplication  
– Four power saving modes: Halt, Active-Halt,  
Wait and Slow  
and time base interrupt, external clock with  
event detector  
4 Communications Interfaces  
Interrupt Management  
– SPI synchronous serial interface  
– Nested interrupt controller  
– 14 interrupt vectors plus TRAP and RESET  
– Top Level Interrupt (TLI) pin  
– SCI asynchronous serial interface (LIN com-  
patible)  
2
– I C multimaster interface  
– CAN interface (2.0B Passive)  
– 15 external interrupt lines (on 4 vectors)  
Up to 64 I/O Ports  
Analog peripheral  
– 10-bit ADC with 16 input pins  
– 48 multifunctional bidirectional I/O lines  
– 34 alternate function lines  
– 16 high sink outputs  
Instruction Set  
5 Timers  
– 8-bit Data Manipulation  
– 63 Basic Instructions  
– 17 main Addressing Modes  
– 8 x 8 Unsigned Multiply Instruction  
Development Tools  
– Main Clock Controller with: Real time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
– Two 16-bit timers with: 2 input captures, 2 out-  
put compares, external clock input on one tim-  
er, PWM and pulse generator modes  
– Full hardware/software development package  
– In-Circuit Testing capability  
– 8-bit PWM Auto-Reload timer with: 2 input  
captures, 4 PWM outputs, output compare  
Device Summary  
Features  
ST72(F)521(M/R/AR)9  
60K  
ST72521(R/AR)7  
48K  
ST72(F)521(R/AR)6  
32K  
Program memory - bytes  
RAM (stack) - bytes  
Operating Voltage  
2048 (256)  
1536 (256)  
1024 (256)  
3.8V to 5.5V  
up to -40°C to +125°C  
N/A  
Temp. Range (ROM)  
Temp. Range (Flash)  
up to -40°C to +125°C  
up to -40°C to +125 °C  
TQFP80 14x14 (M), TQFP64  
14x14 (R), TQFP64 10x10 (AR)  
Package  
TQFP64 14x14 (R), TQFP64 10x10 (AR)  
Rev. 1.6  
1/199  
October 2002  
1

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