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ST72F561AR6T3/XXX PDF预览

ST72F561AR6T3/XXX

更新时间: 2024-11-03 15:53:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟外围集成电路
页数 文件大小 规格书
264页 5574K
描述
8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, ROHS COMPLIANT, LQFP-64

ST72F561AR6T3/XXX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:10 X 10 MM, ROHS COMPLIANT, LQFP-64针数:64
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.64Is Samacsys:N
具有ADC:YES地址总线宽度:
位大小:8最大时钟频率:16 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G64
长度:10 mmI/O 线路数量:48
端子数量:64最高工作温度:125 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:1.6 mm
速度:8 MHz最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

ST72F561AR6T3/XXX 数据手册

 浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第2页浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第3页浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第4页浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第5页浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第6页浏览型号ST72F561AR6T3/XXX的Datasheet PDF文件第7页 
ST72561  
8-bit MCU with Flash or ROM,  
10-bit ADC, 5 timers, SPI, LINSCI, active CAN  
Features  
Memories  
– 16K to 60K High Density Flash (HDFlash) or  
ROM with read-out protection capability. In-  
Application Programming and In-Circuit Pro-  
gramming for HDFlash devices  
LQFP32  
7x7mm  
LQFP64  
14x14mm  
– 1 to 2K RAM  
– HDFlash endurance: 100 cycles, data reten-  
tion 40 years at 85°C  
Clock, Reset and Supply Management  
– Low power crystal/ceramic resonator oscilla-  
tors and bypass for external clock  
– PLL for 2x frequency multiplication  
LQFP44  
10x10mm  
LQFP64  
10x10mm  
– 5 power saving modes: Halt, Auto Wake Up  
From Halt, Active Halt, Wait and Slow  
Interrupt Management  
– Main clock controller with real-time base and  
clock output  
– Window watchdog timer  
– Nested interrupt controller  
– 14 interrupt vectors plus TRAP and RESET  
– TLI top level interrupt (on 64-pin devices)  
– Up to 21 external interrupt lines (on 4 vectors)  
Up to 48 I/O Ports  
Up to 4 Communications Interfaces  
– SPI synchronous serial interface  
– Master/slave LINSCIasynchronous serial  
interface  
– Up to 48 multifunctional bidirectional I/O lines  
– Up to 36 alternate function lines  
– Up to 6 high sink outputs  
– Master-only LINSCIasynchronous serial in-  
terface  
– CAN 2.0B active  
Analog Peripheral (Low Current Coupling)  
– 10-bit A/D converter with up to 16 inputs  
– Up to 9 robust ports (low current coupling)  
Instruction Set  
– 8-bit data manipulation  
– 63 basic instructions  
– 17 main addressing modes  
– 8 x 8 unsigned multiply instruction  
Development Tools  
5 Timers  
– 16-bit timer with 2 input captures, 2 output  
compares, external clock input, PWM and  
pulse generator modes  
– 8-bit timer with 1 or 2 input captures, 1 or 2  
output compares, PWM and pulse generator  
modes  
– 8-bit PWM auto-reload timer with 1 or 2 input  
captures, 2 or 4 independent PWM output  
channels, output compare and time base in-  
terrupt, external clock with event detector  
– Full hardware/software development package  
Table 1. Device Summary  
Features  
ST72561(AR/J/K)9  
ST72561(AR/J/K)7  
ST72561(AR/J/K)6  
Program memory - bytes  
RAM (stack) - bytes  
Operating Supply  
CPU Frequency  
60K  
48K  
2K (256)  
32K  
2K (256)  
1K (256)  
4.5V to 5.5V  
External Resonator Osc. w/ PLLx2/8 MHz  
-40°C to +125°C  
Max. Temp. Range  
Packages  
LQFP64 10x10mm (AR), LQFP44 10x10mm (J), LQFP32 7x7mm (K)  
Rev. 6  
1/263  
June 2007  
1

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