生命周期: | Active | 包装说明: | SOP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.75 | Is Samacsys: | N |
系列: | SSTL | JESD-30 代码: | R-PDSO-G48 |
逻辑集成电路类型: | D LATCH | 位数: | 14 |
功能数量: | 1 | 端子数量: | 48 |
最高工作温度: | 70 °C | 最低工作温度: | |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 3.6 V | 最小供电电压 (Vsup): | 2.3 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
温度等级: | COMMERCIAL | 端子形式: | GULL WING |
端子位置: | DUAL | 触发器类型: | POSITIVE EDGE |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SSTL16857DG | NXP |
获取价格 |
IC SSTL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48, PLASTIC, TSSOP-4 | |
SSTL16857DGG | NXP |
获取价格 |
14-bit SSTL_2 registered driver with differential clock inputs | |
SSTL16857DGG,118 | NXP |
获取价格 |
SSTL16857DGG | |
SSTL16877 | NXP |
获取价格 |
14-bit SSTL_2 registered driver with differential clock inputs | |
SSTL16877DGG | NXP |
获取价格 |
14-bit SSTL_2 registered driver with differential clock inputs | |
SSTL16877DGG,512 | NXP |
获取价格 |
SSTL16877DGG | |
SSTL16877DGG,518 | NXP |
获取价格 |
SSTL16877DGG | |
SSTL16877DGG/G | NXP |
获取价格 |
IC POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48, 6.10 MM, LEAD FREE, PLASTIC, | |
SSTL16877DGG/G,118 | NXP |
获取价格 |
SSTL16877DGG | |
SSTL16877DG-T | NXP |
获取价格 |
暂无描述 |