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SST89E554-40-C-PJ

更新时间: 2024-11-11 22:59:19
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FlashFlex51 MCU

SST89E554-40-C-PJ 数据手册

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FlashFlex51 MCU  
SST89E564 / SST89V564 / SST89E554 / SST89V554  
SST89E/V564 SST89E/VE554 FlashFlex51 MCU  
Preliminary Specifications  
FEATURES:  
8-bit 8051 Family Compatible Microcontroller  
(MCU) with Embedded SuperFlash Memory  
Three High-Current Drive Pins (16 mA each)  
Three 16-bit Timers/Counters  
SST89E564/SST89E554 is 5V Operation  
– 0 to 40 MHz Operation at 5V  
Full-Duplex Enhanced UART  
– Framing error detection  
SST89V564/SST89V554 is 3V Operation  
– 0 to 25 MHz Operation at 3V  
– Automatic address recognition  
Eight Interrupt Sources at 4 Priority Levels  
Watchdog Timer (WDT)  
Fully Software and Development Toolset  
Compatible as well as Pin-For-Pin Package  
Compatible with Standard 8xC5x Microcontrollers  
Four 8-bit I/O Ports (32 I/O Pins)  
Second DPTR register  
1 KByte Register/Data RAM  
Reduce EMI Mode (Inhibit ALE through AUXR SFR)  
SPI Serial Interface  
Dual Block SuperFlash EEPROM  
– SST89E564/SST89V564: 64 KByte primary  
block + 8 KByte secondary block  
(128-Byte sector size)  
– SST89E554/SST89V554: 32 KByte primary  
block + 8 KByte secondary block  
(128-Byte sector size)  
– Individual Block Security Lock  
– Concurrent Operation during In-Application  
Programming (IAP)  
TTL- and CMOS-Compatible Logic Levels  
Brown-out Detection  
Extended Power-Saving Modes  
– Idle Mode  
– Power Down Mode with External Interrupt Wake-up  
– Standby (Stop Clock) Mode  
PDIP-40, PLCC-44 and TQFP-44 Packages  
Temperature Ranges:  
– Block Address Re-mapping  
– Commercial (0°C to +70°C)  
– Industrial (-40°C to +85°C)  
Support External Address Range up to 64  
KByte of Program and Data Memory  
device can be configured as a slave to an external host for  
source code storage or as a master to an external host for  
In-Application Programming (IAP) operation. The device is  
designed to be programmed “In-System” and “In-Applica-  
tion” on the printed circuit board for maximum flexibility. The  
device is pre-programmed with an example of bootstrap  
loader in the memory, demonstrating the initial user pro-  
gram code loading or subsequent user code updating via  
the “IAP” operation. An example of bootstrap loader is for  
the user’s reference and convenience only. SST does not  
guarantee the functionality or the usefulness of the sample  
bootstrap loader. Chip-Erase or Block-Erase operations will  
erase the pre-programmed sample code.  
PRODUCT DESCRIPTION  
SST89E564, SST89V564, SST89E554, and SST89V554  
are members of the FlashFlex51 family of 8-bit microcontrol-  
lers. The FlashFlex51 is a family of microcontroller products  
designed and manufactured on the state-of-the-art Super-  
Flash CMOS semiconductor process technology. The  
device uses the same powerful instruction set and is pin-for-  
pin compatible with standard 8xC5x microcontroller devices.  
The device comes with 72/40 KByte of on-chip flash  
EEPROM program memory using SST’s patented and pro-  
prietary CMOS SuperFlash EEPROM technology with the  
SST’s field-enhancing, tunneling injector, split-gate mem-  
ory cells. The SuperFlash memory is partitioned into 2  
independent program memory blocks. The primary Super-  
Flash Block 0 occupies 64/32 KByte of internal program  
memory space and the secondary SuperFlash Block 1  
occupies 8 KByte of internal program memory space. The  
8-KByte secondary SuperFlash block can be mapped to  
the lowest location of the 64/32 KByte address space; it  
can also be hidden from the program counter and used as  
an independent EEPROM-like data memory. The flash  
memory blocks can be programmed via a standard 87C5x  
OTP EPROM programmer fitted with a special adapter and  
firmware for SST’s device. During the power-on reset, the  
In addition to 72/40 KByte of SuperFlash EEPROM pro-  
gram memory on-chip, the device can address up to 64  
KByte of external program memory. In addition to 1024 x 8  
bits of on-chip RAM, up to 64 KByte of external RAM can  
be addressed.  
SST’s highly reliable, patented SuperFlash technology and  
memory cell architecture have a number of important  
advantages for designing and manufacturing flash  
EEPROMs. These advantages translate into significant  
cost and reliability benefits for our customers.  
©2001 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
S71181-03-000 9/01  
1
384  
FlashFlex, In-Application Programming, IAP, and SoftLock are trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  

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