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SST45LF010-10-4C-SAE PDF预览

SST45LF010-10-4C-SAE

更新时间： 2024-11-07 14:44:59
品牌 Logo 应用领域
芯科 - SILICON 时钟光电二极管内存集成电路
页数 文件大小 规格书
16页 201K
描述
Flash, 1MX1, PDSO8, 4.90 X 6 MM, MS-012AA, LEAD FREE, SOIC-8

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SST45LF010-10-4C-SAE 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：4.90 X 6 MM, MS-012AA, LEAD FREE, SOIC-8
针数：8Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.83最大时钟频率 (fCLK)：10 MHz
数据保留时间-最小值：100耐久性：100000 Write/Erase Cycles
JESD-30 代码：R-PDSO-G8长度：4.9 mm
内存密度：1048576 bit内存集成电路类型：FLASH
内存宽度：1功能数量：1
端子数量：8字数：1048576 words
字数代码：1000000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：1MX1封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
并行/串行：SERIAL电源：3.3 V
编程电压：3 V认证状态：Not Qualified
座面最大高度：1.75 mm串行总线类型：SPI
最大待机电流：0.000015 A子类别：Flash Memories
最大压摆率：0.03 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
类型：NOR TYPE宽度：3.9 mm
写保护：HARDWAREBase Number Matches：1

SST45LF010-10-4C-SAE 数据手册

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1 Mbit Serial Flash  
SST45LF010  
SST45LF0101Mb 4-wire Serial Interface flash memory  
Data Sheet  
FEATURES:  
•
•
•
•
Single 3.0-3.6V Read and Write Operations  
•
•
Automatic Write Timing  
Serial Interface Architecture  
Byte Serial Read with Single Command  
Superior Reliability  
– Internal VPP Generation  
End-of-Write Detection  
– Software Status  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
•
•
10 MHz Max Clock Frequency  
Hardware Reset Pin (RST#)  
– Resets the device to Standby Mode  
CMOS I/O Compatibility  
•
Low Power Consumption  
– Active Current: 10 mA (typical)  
– Standby Current: 10 µA (typical)  
•
•
Hardware Data Protection (WP#)  
•
•
Sector or Chip-Erase Capability  
– Uniform 4 KByte sectors  
– Protects and unprotects the device from Write  
operation  
Fast Erase and Byte-Program  
•
Packages Available  
– Chip-Erase Time: 70 ms (typical)  
– Sector-Erase Time: 18 ms (typical)  
– Byte-Program Time: 14 µs (typical)  
– 8-lead SOIC (4.9mm x 6mm)  
– 8-contact WSON  
PRODUCT DESCRIPTION  
The SST45LF010 is a 1 Mbit serial flash memory manufac-  
tured with SST’s proprietary, high performance CMOS  
SuperFlash technology. The 1 Mbit of memory is organized  
as 32 sectors of 4096 Bytes. The flash memory uses a 4-  
wire serial interface and a chip enable to select and  
sequentially access its data. The serial interface consists  
of; serial data input (SI), serial data output (SO), serial clock  
(SCK), and chip enable (CE#). A write protect (WP#) inhib-  
its the entire memory from Write operation and a hardware  
reset pin (RST#) resets the device to standby mode.  
Read  
The Read operation outputs the data in order from the ini-  
tial accessed address. While SCK is input, the address will  
be incremented automatically until end (top) of the address  
space (1FFFFH), then the internal address pointer auto-  
matically increments to beginning (bottom) of the address  
space (00000H), and data out stream will continue. The  
read data stream is continuous through all addresses until  
terminated by a low to high transition on CE#.  
The SST45LF010 device is offered in both 8-lead SOIC  
and 8-contact WSON packages. See Figure 2 for the pin  
assignments.  
Sector/Chip-Erase Operation  
The Sector-Erase operation clears all bits in the selected  
sector to FFH. The Chip-Erase instruction clears all bits in  
the device to FFH.  
Device Operation  
The SST45LF010 uses bus cycles of 8 bits each for com-  
mands, data, and addresses to execute operations. The  
operation instructions are listed in Table 3.  
Byte-Program Operation  
The Byte-Program operation programs the bits in the  
selected byte to the desired data. The selected byte must  
be in the erased state (FFH) when initiating a Program  
operation. The data is input from bit 7 to bit 0 in order.  
All instructions are synchronized off a high to low transition  
of CE#. The first low to high transition on SCK will initiate  
the instruction sequence. Inputs will be accepted on the ris-  
ing edge of SCK starting with the most significant bit. Any  
low to high transition on CE# before the input instruction  
completes will terminate any instruction in progress and  
return the device to the standby mode.  
Software Status Operation  
The Status operation determines if an Erase or Program  
operation is in progress. If bit 0 is at a “0” an Erase or Pro-  
gram operation is in progress, the device is busy. If bit 0 is  
at a “1” the device is ready for any valid operation. The sta-  
tus read is continuous with ongoing clock cycles until termi-  
nated by a low to high transition on CE#.  
©2003 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71128-04-000 3/03  
1
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