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SRC4382
SBFS030C–JANUARY 2006–REVISED SEPTEMBER 2007
Two-Channel, Asynchronous Sample Rate Converter with
Integrated Digital Audio Interface Receiver and Transmitter
1
FEATURES
•
Digital Audio Interface Receiver (DIR)
234
•
Two-Channel Asynchronous Sample Rate
Converter (SRC)
–
–
–
–
–
PLL Lock Range Includes Sampling Rates
from 20kHz to 216kHz
–
Dynamic Range with –60dB Input
(A-Weighted): 128dB typical
Includes Four Differential Input Line
Receivers and an Input Multiplexer
–
Total Harmonic Distortion and Noise
(THD+N) with Full-Scale Input: –125dB
typical
Bypass Multiplexer Routes Line Receiver
Outputs to Line Driver and Buffer Outputs
Block-Sized Data Buffers for Both Channel
Status and User Data
–
–
–
–
Supports Audio Input and Output Data
Word Lengths Up to 24 Bits
Automatic Detection of Non-PCM Audio
Streams (DTS CD/LD and IEC 61937
formats)
Supports Input and Output Sampling
Frequencies Up to 216kHz
Automatic Detection of the Input-to-Output
Sampling Ratio
–
–
–
Audio CD Q-Channel Sub-Code Decoding
and Data Buffer
Wide Input-to-Output Conversion Range:
16:1 to 1:16 Continuous
Status Registers and Interrupt Generation
for Flag and Error Conditions
–
–
Excellent Jitter Attenuation Characteristics
Low Jitter Recovered Clock Output
Digital De-Emphasis Filtering for 32kHz,
44.1kHz, and 48kHz Input Sampling Rates
•
Two Audio Serial Ports (Ports A and B)
–
Synchronous Serial Interface to External
Signal Processors, Data Converters, and
Logic
–
Digital Output Attenuation and Mute
Functions
–
–
Output Word Length Reduction
–
–
–
Slave or Master Mode Operation with
Sampling Rates up to 216kHz
Status Registers and Interrupt Generation
for Sampling Ratio and Ready Flags
Supports Left-Justified, Right-Justified, and
Philips I2S™ Data Formats
•
Digital Audio Interface Transmitter (DIT)
Supports Audio Data Word Lengths Up to
24 Bits
–
–
Supports Sampling Rates Up to 216kHz
Includes Differential Line Driver and
CMOS Buffered Outputs
•
•
Four General-Purpose Digital Outputs
–
Multifunction Programmable Via Control
Registers
–
–
Block-Sized Data Buffers for Both Channel
Status and User Data
Extensive Power-Down Support
Status Registers and Interrupt Generation
for Flag and Error Conditions
–
Functional Blocks May Be Disabled
Individually When Not In Use
•
User-Selectable Serial Host Interface: SPI or
Philips I2C™
•
•
Operates From +1.8V Core and +3.3V I/O
Power Supplies
–
Provides Access to On-Chip Registers and
Data Buffers
Small TQFP-48 Package, Compatible with the
SRC4392 and DIX4192
U.S. Patent No. 7,262,716
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
4
Dolby is a registered trademark of Dolby Laboratories.
I2C, I2S are trademarks of Koninklijke Philips Electronics N.V.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated