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SPC564A70L7CFAR PDF预览

SPC564A70L7CFAR

更新时间: 2024-10-29 17:33:19
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
133页 984K
描述
用于汽车动力系统应用的32位Power Architecture MCU

SPC564A70L7CFAR 数据手册

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SPC564A70B4, SPC564A70L7  
32-bit Power Architecture® based MCU for automotive  
powertrain applications  
Datasheet  
preliminary data  
Features  
150 MHz e200z4 Power Architecture® core  
PBGA324 (23 mm x 23 mm)  
LQFP176 (24 mm x 24 mm)  
– Variable length instruction encoding (VLE)  
– 1 FlexRay module (V2.1) up to 10 Mbit/s  
w/dual or single channel, 128 message  
objects, ECC  
– Superscalar architecture with 2 execution  
units  
– Up to 2 integer or floating point instructions  
per cycle  
1 eMIOS (24 unified channels)  
– Up to 4 multiply and accumulate operations  
per cycle  
1 eTPU2 (second generation eTPU)  
– 32 standard channels  
Memory organization  
– 1 reaction module (6 channels with 3  
outputs per channel)  
– 2 MB on-chip flash memory with ECC and  
read-while-write (RWW)  
2 enhanced queued analog-to-digital  
converters (eQADCs)  
– 128 KB on-chip SRAM with standby  
functionality (32 KB) and ECC  
– Forty 12-bit input channels  
– 8 KB instruction cache (with line locking),  
configurable as 2- or 4-way  
– 688 ns minimum conversion time  
On-chip CAN/SCI Bootstrap loader with Boot  
Assist Module (BAM)  
– 14 + 3 KB eTPU code and data RAM  
– 4 × 4 crossbar switch (XBAR)  
– 24-entry MMU  
Nexus: Class 3+ for core; Class 1 for eTPU  
JTAG (5-pin)  
Fail Safe Protection  
Development Trigger Semaphore (DTS)  
– 16-entry Memory Protection Unit (MPU)  
– CRC unit with 3 submodules  
– Junction temperature sensor  
Clock generation  
– On-chip 4–40 MHz main oscillator  
– On-chip FMPLL (frequency-modulated  
phase-locked loop)  
Interrupt  
– Configurable interrupt controller (INTC)  
with non-maskable interrupt (NMI)  
Up to 112 general purpose I/O lines  
– 64-channel eDMA  
Power reduction modes: slow, stop, and  
standby  
Serial channels  
Flexible supply scheme  
– 3 eSCI modules  
– 5 V single supply with external ballast  
– 3 DSPI modules (2 of which support  
downstream Micro Second Channel [MSC])  
– Multiple external supply: 5 V, 3.3 V , and  
1.2 V  
– 3 FlexCAN modules with 64 message  
buffers each  
Designed for LQFP176, LBGA208, PBGA324  
Table 1.  
Device summary  
Part number  
Memory Flash size  
Package LQFP176  
Package LBGA208  
Package PBGA324  
2MB  
SPC564A70L7  
-
SPC564A70B4  
September 2013  
Doc ID 18078 Rev 4  
1/133  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to  
change without notice.  
www.st.com  
1
 

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