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SPC5644AF0MVZ2

更新时间: 2024-10-29 00:47:07
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飞思卡尔 - FREESCALE PC微控制器
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138页 2489K
描述
MPC5644A Microcontroller Data Sheet

SPC5644AF0MVZ2 数据手册

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Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MPC5644A  
Rev. 7, Jan 2012  
MPC5644A  
MPC5644A Microcontroller  
Data Sheet  
208 (17 x 17 mm)  
324 (23 x 23 mm)  
176 (24 x 24 mm)  
2 enhanced queued analog-to-digital converters  
(eQADCs)  
150 MHz e200z4 Power Architecture core  
Variable length instruction encoding (VLE)  
Forty 12-bit input channels (multiplexed on 2 ADCs);  
expandable to 56 channels with external multiplexers  
6 command queues  
Trigger and DMA support  
688 ns minimum conversion time  
Superscalar architecture with 2 execution units  
Up to 2 integer or floating point instructions per cycle  
Up to 4 multiply and accumulate operations per cycle  
Memory organization  
4 MB on-chip flash memory with ECC and Read  
While Write (RWW)  
192 KB on-chip SRAM with standby functionality  
(32 KB) and ECC  
8 KB instruction cache (with line locking),  
configurable as 2- or 4-way  
On-chip CAN/SCI/FlexRay Bootstrap loader with Boot  
Assist Module (BAM)  
Nexus  
Class 3+ for the e200z4 core  
Class 1 for the eTPU  
JTAG (5-pin)  
Development Trigger Semaphore (DTS)  
14 + 3 KB eTPU code and data RAM  
5 4 crossbar switch (XBAR)  
24-entry MMU  
External Bus Interface (EBI) with slave and master  
port  
Register of semaphores (32-bits) and an identification  
register  
Used as part of a triggered data acquisition protocol  
EVTO pin is used to communicate to the external tool  
Fail Safe Protection  
Clock generation  
Interrupts  
Serial channels  
16-entry Memory Protection Unit (MPU)  
CRC unit with 3 sub-modules  
Junction temperature sensor  
On-chip 4–40 MHz main oscillator  
On-chipFMPLL(frequency-modulatedphase-locked  
loop)  
Up to 120 general purpose I/O lines  
Configurable interrupt controller (with NMI)  
64-channel DMA  
Individually programmable as input, output or special  
function  
Programmable threshold (hysteresis)  
3 eSCI  
Power reduction mode: slow, stop and stand-by modes  
Flexible supply scheme  
3 DSPI (2 of which support downstream Micro  
Second Channel [MSC])  
3 FlexCAN with 64 messages each  
1 FlexRay module (V2.1) up to 10 Mbit/s with dual  
or single channel and 128 message objects and ECC  
5 V single supply with external ballast  
Multiple external supply: 5 V, 3.3 V and 1.2 V  
Packages  
176 LQFP  
208 MAPBGA  
324 TEPBGA  
1 eMIOS:  
1 eTPU2 (second generation eTPU)  
24 unified channels  
32 standard channels  
1 reaction module (6 channels with three outputs  
per channel)  
496-pin CSP (calibration tool only)  
This document contains information on a product under development. Freescale reserves  
the right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2009–2012. All rights reserved.  

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