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SP8720ADG PDF预览

SP8720ADG

更新时间: 2024-11-11 04:03:15
品牌 Logo 应用领域
通用电气 - GE 逻辑集成电路时钟
页数 文件大小 规格书
6页 118K
描述
ECL two-modulus divider, with ECL10K compatible outputs

SP8720ADG 数据手册

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ADVANCE INFORMATION  
DS3650-1·2  
SP8720  
300MHz43/4  
The SP8720 is an ECL two-modulus divider, with ECL10K  
compatible outputs. It divides by 3 when either of the ECL control  
inputs, PE1 orPE2, is in the high state and by 4 when both are low  
(or open circuit). An AC coupled input of 600mVp-p is required.  
16  
1
2
3
4
5
6
7
8
CLOCK INPUT  
PE1  
INTERNAL BIAS DECOUPLING  
15  
NC  
CONTROL  
INPUTS  
FEATURES  
14  
PE2  
NC  
NC  
ECL Compatible Outputs  
AC-Coupled Input (Internal Bias)  
Control Inputs ECL III/10K Compatible  
13  
NC  
SP8720  
12  
V
V
CC  
EE  
11  
NC  
NC  
DO NOT CONNECT  
10  
NC  
QUICK REFERENCE DATA  
Supply Voltage: 25·2V  
Power Consumption: 240mW  
Temperature Range:  
9
OUTPUT  
OUTPUT  
DG16  
Fig. 1 Pin connections - top view  
255°C to 1125°C (A Grade)  
230°C to 170°C (B Grade)  
ORDERING INFORMATION  
ABSOLUTE MAXIMUM RATINGS  
28V  
20mA  
265°C to 1150°C  
1175°C  
Supply voltage  
Output current  
Storage temperature range  
Max. junction temperature  
Max. clock input voltage  
SP8720 A DG  
SP8720 B DG  
5962-90577 (SMD)  
2·5V p-p  
V
(0V)  
5
CC  
8
9
D1  
Q1  
D2 Q2  
2
3
OUTPUT  
OUTPUT  
PE1  
PE2  
Q2  
CK  
CK  
1
CLOCK INPUT  
16  
12  
INTERNAL BIAS  
DECOUPLING  
V
EE  
Fig. 2 Functional diagram  

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