SN54HCT125, SN74HCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS069D – NOVEMBER 1988 – REVISED MARCH 2003
Operating Voltage Range of 4.5 V to 5.5 V
±6-mA Output Drive at 5 V
High-Current Outputs Drive Up To 15
LSTTL Loads
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Low Power Consumption, 80-µA Max I
CC
High-Current 3-State Outputs Drive Bus
Lines or Buffer Memory Address Registers
Typical t = 12 ns
pd
SN54HCT125 . . . FK PACKAGE
(TOP VIEW)
SN54HCT125 . . . J OR W PACKAGE
SN74HCT125 . . . D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1OE
1A
1Y
2OE
2A
2Y
V
CC
4OE
4A
3
2
1
20 19
18
4A
NC
4Y
1Y
NC
4
5
6
7
8
17
16
4Y
3OE
3A
2OE
NC
15 NC
14
9 10 11 12 13
3OE
2A
8
GND
3Y
NC – No internal connection
description/ordering information
These bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
SOIC – D
Tube
SN74HCT125N
SN74HCT125D
SN74HCT125DR
SNJ54HCT125J
SNJ54HCT125W
SNJ54HCT125FK
SN74HCT125N
–40°C to 85°C
–55°C to 125°C
Tube
HCT125
Tape and reel
Tube
CDIP – J
CFP – W
LCCC – FK
SNJ54HCT125J
SNJ54HCT125W
SNJ54HCT125FK
Tube
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
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