Datasheet > SNJ54F32W

SNJ54F32W

更新时间： 2024-11-20 04:50:55

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
6页	92K
描述
QUADRUPLE 2-INPUT POSITIVE-OR GATES

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SNJ54F32W 数据手册

SN54F32, SN74F32

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SDFS044B – MARCH 1987 – REVISED MAY 1999

SN54F32 . . . J PACKAGE

SN74F32 . . . D OR N PACKAGE

(TOP VIEW)

Package Options Include Plastic

Small-Outline (D) Packages, Ceramic Chip

Carriers (FK), and Standard Plastic (N) and

Ceramic (J) DIPs

description

These devices contain four independent 2-input

OR gates. They perform the Boolean functions

Y = A + B or Y = A • B in positive logic.

GND

The SN54F32 is characterized for operation over

the full military temperature range of –55°C to

125°C. The SN74F32 is characterized for

operation from 0°C to 70°C.

SN54F32 . . . FK PACKAGE

(TOP VIEW)

FUNCTION TABLE

(each gate)

2 1 20 19

INPUTS

OUTPUT

17 NC

9 10 11 12 13

NC – No internal connection

†

logic symbol

≥1

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

logic diagram, each gate (positive logic)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

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