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SNJ54F374J PDF预览

SNJ54F374J

更新时间: 2024-11-04 04:50:55
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路输出元件
页数 文件大小 规格书
17页 690K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SNJ54F374J 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP-20针数:20
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.1Is Samacsys:N
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:F/FASTJESD-30 代码:R-GDIP-T20
长度:24.195 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:60000000 Hz
最大I(ol):0.02 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):86 mA
Prop。Delay @ Nom-Sup:11 ns传播延迟(tpd):11 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

SNJ54F374J 数据手册

 浏览型号SNJ54F374J的Datasheet PDF文件第2页浏览型号SNJ54F374J的Datasheet PDF文件第3页浏览型号SNJ54F374J的Datasheet PDF文件第4页浏览型号SNJ54F374J的Datasheet PDF文件第5页浏览型号SNJ54F374J的Datasheet PDF文件第6页浏览型号SNJ54F374J的Datasheet PDF文件第7页 
ꢉ ꢊꢋꢌꢍꢈꢎ ꢏꢐ ꢎꢑꢋ ꢒꢓ ꢐꢐ ꢎꢒ ꢎꢏꢈ ꢏꢑꢋ ꢔꢕ ꢎꢈꢄ ꢍ ꢓꢕ ꢑ ꢄꢍꢉ ꢕ  
SDFS077A − D2932, MARCH 1987 − REVISED OCTOBER 1993  
SN54F374 . . . J PACKAGE  
SN74F374 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
Eight D-Type Flip-Flops in a Single Package  
3-State Bus-Driving True Outputs  
Full Parallel Access for Loading  
Buffered Control Inputs  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
13 5D  
12 5Q  
description  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
11  
GND  
CLK  
SN54F374 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the F374 are edge-triggered  
D-type flip-flops. On the positive transition of the  
clock (CLK) input, the Q outputs are set to the logic  
levels that were set up at the data (D) inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or a high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
need for interface or pullup components.  
14 6D  
9 10 11 12 13  
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54F374 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74F374 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
ꢋꢤ  
Copyright 1993, Texas Instruments Incorporated  
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ꢡꢙ  
ꢢꢤ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SNJ54F374J 替代型号

型号 品牌 替代类型 描述 数据表
JM38510/34105BRA TI

完全替代

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SNJ54F374W TI

完全替代

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
5962-9759001QSA TI

完全替代

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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