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SNA-100

更新时间： 2024-11-28 22:21:35
品牌 Logo 应用领域
STANFORD 放大器射频微波
页数 文件大小 规格书
3页 65K
描述
DC-10 GHz, Cascadable GaAs MMIC Amplifier

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中文翻译

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SNA-100 数据手册

 浏览型号SNA-100的Datasheet PDF文件第2页浏览型号SNA-100的Datasheet PDF文件第3页 
Product Description  
Stanford Microdevices’ SNA-100 is a GaAs monolithic  
broadband amplifier (MMIC) in die form. This amplifier  
provides 12dB of gain when biased at 50mA and 4V.  
SNA-100  
DC-10 GHz, Cascadable  
GaAs MMIC Amplifier  
External DC decoupling capacitors determine low frequency  
response. The use of an external resistor allows for bias  
flexibility and stability.  
These unconditionally stable amplifiers are designed for use  
as general purpose 50 ohm gain blocks.  
Also available in packaged form (SNA-176, -186 & -187), its  
small size (0.33mm x 0.33mm) and gold metallization makes it  
an ideal choice for use in hybrid circuits.  
The SNA-100 is available in gel paks at 100 devices per  
container.  
Product Features  
•Cascadable 50 Ohm Gain Block  
• 12dB Gain, +13dBm P1dB  
• 1.5:1 Input and Output VSWR  
•Operates From Single Supply  
• Chip Back is Ground  
Output Power vs. Frequency  
15  
14  
13  
dBm  
12  
11  
10  
Applications  
0.5  
1
1.5  
2
4
6
8
10  
• Narrow and Broadband Linear Amplifiers  
• Commercial and Industrial Applications  
GHz  
Electrical Specifications at Ta = 25C  
P a r a m e t e r s : T e s t C o n d i t i o n s :  
I d 5 0 m A , 5 0 O h m  
S y m b o l  
U n i t s  
M
i n .  
T y p .  
M a x .  
=
Z
=
s
0
f
f
f
=
=
=
0 . 1 - 2 . 0 G H z  
2 . 0 - 6 . 0 G H z  
6 . 0 - 1 0 G H z  
d B  
d B  
d B  
1 1 . 0  
1 0 . 0  
9 . 0  
1 2 . 0  
1 1 . 0  
1 0 . 0  
S m a ll S ig n a l P o w e r G a in  
G
P
G a in F la t n e s s  
3 d B B a n d w id t h  
f
=
0 . 1 - 8 . 0 G H z  
d B  
+ / - 0 . 5  
1 0 . 0  
G
F
B W 3 d B  
G H z  
d B m  
O u t p u t P o w e r a t 1 d B C o m p r e s s io n  
N o is e F ig u r e  
f
=
2 . 0 G H z  
1 3 . 0  
P
1 d B  
N F  
f
f
=
=
2 . 0 G H z  
d B  
-
6 . 0  
V S W  
I P  
R
I n p u t  
/
O u t p u t  
0 . 1 - 1 0 G H z  
1 . 5 : 1  
T h ir d O r d e r I n t e r c e p t P o in t  
G r o u p D e la y  
f
f
f
=
=
=
2 . 0 G H z  
d B m  
p s e c  
2 6  
3
2 . 0 G H z  
1 0 0  
T
D
I S O L  
V D  
R e v e r s e I s o la t io n  
D e v ic e V o lt a g e  
0 . 1 - 1 0 G H z  
d B  
V
1 6  
4 . 0  
3 . 5  
4 . 5  
d G / d T  
d V / d T  
- 0 . 0 0 1 5  
- 4 . 0  
D e v ic e  
T e m p e r a t u r e C o e ff ic ie n t  
/ d e g C  
G a i n  
d B  
D e v ic e V o lt a g e T e m p e r a t u r e C o e ff ic ie n t  
m
V / d e g C  
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions.  
Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford  
Microdevices product for use in life-support devices and/or systems.  
Copyright 1999 Stanford Microdevices, Inc. All worldwide rights reserved.  
522 Almanor Ave., Sunnyvale, CA 94086  
Phone: (800) SMI-MMIC  
http://www.stanfordmicro.com  
5-5  
123

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