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SN74S1056 PDF预览

SN74S1056

更新时间: 2024-11-05 04:51:11
品牌 Logo 应用领域
德州仪器 - TI 二极管
页数 文件大小 规格书
8页 175K
描述
8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

SN74S1056 数据手册

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SN74S1056  
8-BIT SCHOTTKY BARRIER DIODE  
BUS-TERMINATION ARRAY  
SDLS019B – APRIL 1990 – REVISED JULY 1997  
SC PACKAGE  
(TOP VIEW)  
Designed to Reduce Reflection Noise  
Repetitive Peak Forward Current 300 mA  
8-Bit Array Structure Suited for  
Bus-Oriented Systems  
D01  
D02  
D03  
D04  
GND  
GND  
D05  
D06  
D07  
1
2
3
4
5
6
7
8
9
description  
This Schottky barrier diode bus-termination array  
is designed to reduce reflection noise on memory  
bus lines. This device consists of an 8-bit  
high-speed Schottky diode array suitable for a  
clamp to GND.  
D08 10  
The SN74S1056 is characterized for operation  
from 0°C to 70°C.  
D PACKAGE  
(TOP VIEW)  
NC  
D01  
D02  
D03  
D04  
D05  
D06  
D07  
D08  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
GND  
GND  
GND  
GND  
GND  
GND  
NC  
schematic diagrams  
SC Package  
D Package  
1
1
D01  
D01  
D02  
2
2
3
4
5
6
7
8
D02  
15  
GND  
GND  
GND  
GND  
GND  
GND  
3
D03  
D03  
D04  
D05  
D06  
D07  
14  
13  
12  
11  
6
GND  
4
D04  
7
D05  
5
GND  
8
D06  
9
D07  
10  
10  
D08  
D08  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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