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SN74S1053PWR PDF预览

SN74S1053PWR

更新时间: 2024-11-27 11:08:03
品牌 Logo 应用领域
德州仪器 - TI 驱动二极管总线通信驱动程序和接口
页数 文件大小 规格书
7页 94K
描述
16 位肖特基势垒二极管总线终端阵列 | PW | 20 | 0 to 70

SN74S1053PWR 数据手册

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SN74S1053  
16-BIT SCHOTTKY BARRIER DIODE  
BUS-TERMINATION ARRAY  
SDLS017A – SEPTEMBER 1990 – REVISED AUGUST 1997  
DW OR N PACKAGE  
(TOP VIEW)  
Designed to Reduce Reflection Noise  
Repetitive Peak Forward Current to 200 mA  
16-Bit Array Structure Suited for  
Bus-Oriented Systems  
V
1
2
3
4
5
6
7
8
9
10  
20  
V
CC  
19 D16  
CC  
D01  
D02  
D03  
D04  
D05  
D06  
D07  
D08  
GND  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
18  
17  
16  
15  
14  
13  
12  
11  
D15  
D14  
D13  
D12  
D11  
D10  
D09  
GND  
description  
This Schottky barrier diode bus-termination array  
is designed to reduce reflection noise on memory  
bus lines. This device consists of a 16-bit  
high-speed Schottky diode array suitable for  
clamping to V  
and/or GND.  
CC  
The SN74S1053 is characterized for operation  
from 0°C to 70°C.  
schematic diagrams  
D01 D02  
D03 D04  
D05 D06 D07 D08 D09  
12  
D10  
13  
D11  
14  
D12 D13  
15 16  
D14 D15 D16  
17 18 19  
V
CC  
1
V
CC  
20  
2
3
4
5
6
7
8
9
10  
11  
GND GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74S1053PWR 替代型号

型号 品牌 替代类型 描述 数据表
SN74S1053PW TI

类似代替

16 位肖特基势垒二极管总线终端阵列 | PW | 20 | 0 to 70
SN74S1053PWG4 TI

类似代替

16-Bit Schottky Barrier Diode Bus-Termination Array 20-TSSOP 0 to 70

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