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SN74S1051PWE4 PDF预览

SN74S1051PWE4

更新时间: 2024-11-26 04:51:11
品牌 Logo 应用领域
德州仪器 - TI 总线通信驱动程序和接口二极管接口集成电路光电二极管
页数 文件大小 规格书
13页 342K
描述
12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

SN74S1051PWE4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:GREEN, PLASTIC, TSSOP-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.09
Is Samacsys:N差分输出:NO
接口集成电路类型:DIODE BUS TERMINATION ARRAYJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
湿度敏感等级:1功能数量:1
信号线数量:12端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.2 mm标称供电电压:5 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74S1051PWE4 数据手册

 浏览型号SN74S1051PWE4的Datasheet PDF文件第2页浏览型号SN74S1051PWE4的Datasheet PDF文件第3页浏览型号SN74S1051PWE4的Datasheet PDF文件第4页浏览型号SN74S1051PWE4的Datasheet PDF文件第5页浏览型号SN74S1051PWE4的Datasheet PDF文件第6页浏览型号SN74S1051PWE4的Datasheet PDF文件第7页 
SN74S1051  
12-BIT SCHOTTKY BARRIER DIODE  
BUS-TERMINATION ARRAY  
SDLS018B – SEPTEMBER 1990 – REVISED MARCH 2003  
D, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Designed to Reduce Reflection Noise  
Repetitive Peak Forward Current to 200 mA  
12-Bit Array Structure Suited for  
Bus-Oriented Systems  
V
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
CC  
D12  
D11  
D10  
D09  
D08  
D07  
GND  
D01  
D02  
D03  
D04  
D05  
D06  
GND  
description/ordering information  
This Schottky barrier diode bus-termination array  
is designed to reduce reflection noise on memory  
bus lines. This device consists of a 12-bit  
high-speed Schottky diode array suitable for  
clamping to V  
and/or GND.  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube  
SN74S1051N  
SN74S1051N  
Tube  
SN74S1051D  
S1051  
0°C to 70°C  
Tape and reel  
Tape and reel  
Tape and reel  
SN74S1051DR  
SN74S1051NSR  
SN74S1051PWR  
SOP – NS  
74S1051  
S1051  
TSSOP – PW  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
schematic diagrams  
D01 D02  
D03 D04  
D05 D06 D07 D08 D09  
10 11 12  
D10  
13  
D11  
14  
D12  
15  
V
CC  
1
V
CC  
16  
2
3
4
5
6
7
8
9
GND GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74S1051PWE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74S1051PWR TI

完全替代

12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY
SN74S1051PW TI

完全替代

12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY
SN74S1051NSR TI

完全替代

12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

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