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SN74LVTH245AMDBREP PDF预览

SN74LVTH245AMDBREP

更新时间: 2024-11-21 12:21:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
13页 510K
描述
3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVTH245AMDBREP 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SSOP
包装说明:SSOP, SSOP20,.3针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.68Is Samacsys:N
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:7.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):5 mAProp。Delay @ Nom-Sup:3.5 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
施密特触发器:No座面最大高度:2 mm
子类别:Bus Driver/Transceiver最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:5.3 mm
Base Number Matches:1

SN74LVTH245AMDBREP 数据手册

 浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第2页浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第3页浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第4页浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第5页浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第6页浏览型号SN74LVTH245AMDBREP的Datasheet PDF文件第7页 
SN74LVTH245A-EP  
3.3-V ABT OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS768ANOVEMBER 2003REVISED JUNE 2006  
FEATURES  
Controlled Baseline  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– One Assembly/Test Site, One Fabrication  
Site  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
DB OR PW PACKAGE  
(TOP VIEW)  
Enhanced Product-Change Notification  
(1)  
Qualification Pedigree  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
V
CC  
Supports Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V VCC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
)
A3  
A4  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
A5  
Supports Unregulated Battery Operation  
Down to 2.7 V  
A6  
A7  
Ioff and Power-Up 3-State Support Hot  
Insertion  
A8  
GND  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
This octal bus transceiver is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to  
provide a TTL interface to a 5-V system environment.  
This device is designed for asynchronous communication between data buses. It transmits data from the A bus  
to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The  
output-enable (OE) input can be used to disable the device so the buses are effectively isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not recommended.  
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry  
disables the outputs, preventing damaging current backflow through the device when it is powered down. The  
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,  
which prevents driver conflict.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LVTH245AMDBREP 替代型号

型号 品牌 替代类型 描述 数据表
V62/04723-02YE TI

完全替代

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVTH245ADBR TI

类似代替

3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVT245BDBR TI

类似代替

3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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