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ꢏ ꢐꢏ ꢌꢅ ꢑꢒꢆ ꢈ ꢉ ꢌꢒꢓ ꢆ ꢒꢔꢕ ꢕ ꢍ ꢖꢗ ꢘꢖ ꢓ ꢅꢍ ꢖ
ꢙ ꢓꢆ ꢇ ꢏ ꢌꢀꢆꢑꢆ ꢍ ꢚ ꢔꢆ ꢎ ꢔꢆꢀ
SCBS780 − NOVEMBER 2003
D
D
D
D
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
D
D
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Enhanced Diminishing Manufacturing
Sources (DMS) Support
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Enhanced Product-Change Notification
†
Qualification Pedigree
Member of the Texas Instruments
Widebus Family
DGG PACKAGE
(TOP VIEW)
D
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
1
48
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1OE
1Y1
1Y2
GND
1Y3
1Y4
2OE
1A1
1A2
GND
1A3
1A4
2
3
4
D
D
Output Ports Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
5
6
7
V
V
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With 3.3-V
CC
CC
8
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
9
V
)
CC
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D
D
D
D
Supports Unregulated Battery Operation
Down To 2.7 V
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
I
and Power-Up 3-State Support Hot
off
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
V
V
CC
CC
4Y1
4Y2
GND
4Y3
4Y4
4A1
4A2
GND
4A3
4A4
3OE
D
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
4OE
description/ordering information
The SN74LVTH162240 is a 16-bit buffer/driver designed specifically for low-voltage (3.3-V) V
operation and
CC
to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented
receivers and transmitters. It has the capability to provide a TTL interface to a 5-V system environment.
This device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting outputs
and symmetrical active-low output-enable (OE) inputs.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
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Copyright 2003, Texas Instruments Incorporated
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1
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