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SN74LVTH162240

更新时间： 2024-11-30 23:06:23
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德州仪器 - TI 驱动器输出元件
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8页 118K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN54LVTH162240, SN74LVTH162240  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS685E – MARCH 1997 – REVISED APRIL 1999  
SN54LVTH162240 . . . WD PACKAGE  
SN74LVTH162240 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
Output Ports Have Equivalent 22-Ω Series  
Resistors, So No External Resistors Are  
Required  
V
V
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
CC  
CC  
)
2Y1  
2Y2  
2A1  
2A2  
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
GND 10  
39 GND  
2Y3  
2Y4  
2A3  
2A4  
11  
12  
38  
37  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
3Y1 13  
3Y2 14  
GND 15  
3Y3 16  
3Y4 17  
36 3A1  
35 3A2  
34 GND  
33 3A3  
32 3A4  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
18  
31  
V
CC  
CC  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
4Y1 19  
4Y2 20  
GND 21  
4Y3 22  
4Y4 23  
4OE 24  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
The ’LVTH162240devices are 16-bit buffers/drivers designed specifically for low-voltage (3.3-V) V operation  
CC  
and to improve both the performance and density of 3-state memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters. They have the capability to provide a TTL interface to a 5-V system  
environment.  
These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting  
outputs and symmetrical active-low output-enable (OE) inputs.  
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to  
reduce overshoot and undershoot.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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SN74LVTH162241DGGR TI

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 		具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、2.7V 至 3.6
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