SN74LVC244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS790B − DECEMBER 2004 − REVISED JANUARY 2008
D
D
D
D
Qualified for Automotive Applications
Operates From 1.65 V to 3.6 V
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
Inputs Accept Voltages to 5.5 V
− 1000-V Charged-Device Model (C101)
Specified From −40°C to 85°C and
−40°C to 125°C
DW OR PW PACKAGE
(TOP VIEW)
D
Max t of 5.9 ns at 3.3 V
pd
D
Typical V
(Output Ground Bounce)
OLP
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
<0.8 V at V = 3.3 V, T = 25°C
CC
A
D
D
Typical V
(Output V Undershoot)
OHV
OH
>2 V at V = 3.3 V, T = 25°C
CC
A
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
)
CC
D
D
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information
This octal buffer/line driver is operational at 1.5-V to 3.6-V V , but is designed specifically for 1.65-V to 3.6-V
CC
V
CC
operation.
The SN74LVC244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator
in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
T
A
PACKAGE
SOIC − DW
Reel of 2000
Reel of 2000
SN74LVC244AQDWRQ1
SN74LVC244AQPWRQ1
LVC244AQ
LVC244AQ
−40°C to 125°C
TSSOP − PW
†
‡
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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