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SN74LVC245A-EP PDF预览

SN74LVC245A-EP

更新时间： 2024-09-29 12:47:03
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 496K
描述
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74LVC245A-EP 数据手册

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SN74LVC245A-EP  
OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS741B–DECEMBER 2003–REVISED AUGUST 2005  
FEATURES  
•
Controlled Baseline  
•
ESD Protection Exceeds JESD 22  
– One Assembly/Test Site, One Fabrication  
Site  
– 2000-V Human-Body Model (A114-A)  
– 1000-V Charged-Device Model (C101)  
•
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
PW PACKAGE  
(TOP VIEW)  
•
•
•
•
•
•
Enhanced Product-Change Notification  
(1)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Qualification Pedigree  
DIR  
A1  
A2  
V
CC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 6.3 ns at 3.3 V  
A3  
A4  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
A5  
A6  
A7  
•
•
•
Typical VOHV (Output VOH Undershoot) >2 V at  
VCC = 3.3 V, TA = 25°C  
A8  
GND  
Ioff Supports Partial-Power-Down Mode  
Operation  
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With 3.3-V  
VCC  
)
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
This octal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC245A is designed for asynchronous communication between data buses. The device transmits  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are  
effectively isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
–40°C to 85°C  
TSSOP – PW  
Reel of 2000  
SN74LVC245AIPWREP  
C245AEP  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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