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SN74LVC245APWTG4 PDF预览

SN74LVC245APWTG4

更新时间: 2024-11-23 09:12:55
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
23页 866K
描述
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVC245APWTG4 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-20
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.04Is Samacsys:N
其他特性:WITH DIRECTION CONTROL控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:6.5 mm逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6.3 ns传播延迟(tpd):12.7 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:4.4 mm
Base Number Matches:1

SN74LVC245APWTG4 数据手册

 浏览型号SN74LVC245APWTG4的Datasheet PDF文件第2页浏览型号SN74LVC245APWTG4的Datasheet PDF文件第3页浏览型号SN74LVC245APWTG4的Datasheet PDF文件第4页浏览型号SN74LVC245APWTG4的Datasheet PDF文件第5页浏览型号SN74LVC245APWTG4的Datasheet PDF文件第6页浏览型号SN74LVC245APWTG4的Datasheet PDF文件第7页 
SN74LVC245A  
www.ti.com  
SCAS218U JANUARY 1993REVISED FEBRUARY 2010  
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS  
Check for Samples: SN74LVC245A  
1
FEATURES  
DB, DGV, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 6.3 ns at 3.3 V  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
VCC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
A3  
A4  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
A5  
Ioff Supports Partial-Power-Down Mode  
Operation  
A6  
A7  
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With 3.3-V VCC  
A8  
GND  
)
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
RGY PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
1000-V Charged-Device Model (C101)  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
DESCRIPTION/ORDERING INFORMATION  
This octal bus transceiver is designed for 1.65-V to  
3.6-V VCC operation.  
The SN74LVC245A is designed for asynchronous  
communication between data buses. The device  
transmits data from the A bus to the B bus or from  
the B bus to the A bus, depending on the logic level  
at the direction-control (DIR) input. The output-enable  
(OE) input can be used to disable the device so the  
buses effectively are isolated.  
10  
11  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LVC245APWTG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC245APWR TI

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SN74LVC245APW TI

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