SN74LVC1G04
SINGLE INVERTER GATE
www.ti.com
SCES214U–APRIL 1999–REVISED FEBRUARY 2007
FEATURES
•
Available in the Texas Instruments
NanoFree™ Package
•
•
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
•
•
•
•
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 3.3 ns at 3.3 V
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
Low Power Consumption, 10-µA Max ICC
–
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
NC
A
V
Y
1
2
3
5
1
2
3
5
NC
A
V
CC
CC
1
2
3
5
NC
A
V
Y
CC
4
GND
Y
4
GND
4
GND
DRY PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
YZV PACKAGE
(BOTTOM VIEW)
3
4
2
3
Y
Y
V
GND
A
GND
A
1
2
3
6
5
4
V
NC
A
GND
CC
2
1
1
4
NC
Y
CC
5
DNU
V
CC
DNU − Do not use
NC – No internal connection
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single inverter gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G04 performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.