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SN74LVC00AQPWRG4Q1 PDF预览

SN74LVC00AQPWRG4Q1

更新时间: 2024-11-18 12:22:31
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德州仪器 - TI 输入元件
页数 文件大小 规格书
10页 217K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATE

SN74LVC00AQPWRG4Q1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:8 weeks风险等级:5.27
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:4.3 ns传播延迟(tpd):14 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:AEC-Q100座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74LVC00AQPWRG4Q1 数据手册

 浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第2页浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第3页浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第4页浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第5页浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第6页浏览型号SN74LVC00AQPWRG4Q1的Datasheet PDF文件第7页 
SN74LVC00A-Q1  
QUADRUPLE 2-INPUT POSITIVE-NAND GATE  
www.ti.com  
SCAS703BSEPTEMBER 2003REVISED FEBRUARY 2008  
1
FEATURES  
D OR PW PACKAGE  
(TOP VIEW)  
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1A  
1B  
VCC  
4B  
4A  
4Y  
3B  
3A  
3Y  
1Y  
2A  
2B  
2Y  
Operates From 2 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.3 ns at 3.3 V  
Typical VOLP (Output Ground Bounce) < 0.8 V  
at VCC = 3.3 V, TA = 25°C  
8
GND  
Typical VOHV (Output VOH Undershoot) > 2 V  
at VCC = 3.3 V, TA = 25°C  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC00A-Q1 quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation.  
The device performs the Boolean function Y = A • B or Y = A + B in positive logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
Reel of 2500  
Reel of 2000  
ORDERABLE PART NUMBER  
SN74LVC00AQDRQ1  
TOP-SIDE MARKING  
LVC00AQ  
SOIC – D  
–40°C to 125°C  
TSSOP – PW  
SN74LVC00AQPWRQ1  
LVC00AQ  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
L
H
H
X
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)  
A
Y
B
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2008, Texas Instruments Incorporated  

SN74LVC00AQPWRG4Q1 替代型号

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