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SN74LVC00ARGYR PDF预览

SN74LVC00ARGYR

更新时间: 2024-11-18 05:17:03
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路输入元件PC
页数 文件大小 规格书
22页 908K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SN74LVC00ARGYR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:VQFN-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.41Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:232325
Samacsys Pin Count:15Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:RGY(S-PVQFN-N14)
Samacsys Released Date:2015-08-26 15:45:19Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:S-PQCC-N14
JESD-609代码:e4长度:3.5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A湿度敏感等级:2
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC14/18,.14SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:5.5 ns传播延迟(tpd):12.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.5 mm
Base Number Matches:1

SN74LVC00ARGYR 数据手册

 浏览型号SN74LVC00ARGYR的Datasheet PDF文件第2页浏览型号SN74LVC00ARGYR的Datasheet PDF文件第3页浏览型号SN74LVC00ARGYR的Datasheet PDF文件第4页浏览型号SN74LVC00ARGYR的Datasheet PDF文件第5页浏览型号SN74LVC00ARGYR的Datasheet PDF文件第6页浏览型号SN74LVC00ARGYR的Datasheet PDF文件第7页 
SN54LVC00A, SN74LVC00A  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
www.ti.com  
SCAS279PJANUARY 1993REVISED JULY 2005  
FEATURES  
Operate From 1.65 V to 3.6 V  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Specified From –40°C to 85°C, –40°C to 125°C,  
and –55°C to 125°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.3 ns at 3.3 V  
Typical VOLP (Output Ground Bounce)  
– 1000-V Charged-Device Model (C101)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
xxxxxx  
xxxxxx  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
SN54LVC00A . . . J OR W PACKAGE  
SN74LVC00A . . . D, DB, NS, OR PW PACKAGE  
(TOP VIEW)  
SN74LVC00A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVC00A . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
1A  
1B  
V
CC  
14  
13  
1
14  
3
2
1
20 19  
18  
4B  
4A  
NC  
4Y  
NC  
3B  
1Y  
NC  
2A  
4
5
6
7
8
1B  
1Y  
2A  
2B  
2Y  
13 4B  
2
3
4
5
6
1Y  
2A  
2B  
2Y  
12 4A  
17  
16  
15  
14  
12  
11  
10  
9
4A  
4Y  
3B  
3A  
4Y  
3B  
3A  
3Y  
11  
10  
9
NC  
2B  
GND  
8
9 10 11 12 13  
7
8
NC - No internal connection  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.  
The 'LVC00A devices perform the Boolean function Y = A B or Y = A + B in positive logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  

SN74LVC00ARGYR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC00ARGYRG4 TI

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