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SN74LVC02APWLE PDF预览

SN74LVC02APWLE

更新时间: 2024-11-18 12:15:03
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
25页 1292K
描述
QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SN74LVC02APWLE 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:PLASTIC, TSSOP-14针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.19Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:NOR GATE最大I(ol):0.024 A
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):10.4 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74LVC02APWLE 数据手册

 浏览型号SN74LVC02APWLE的Datasheet PDF文件第2页浏览型号SN74LVC02APWLE的Datasheet PDF文件第3页浏览型号SN74LVC02APWLE的Datasheet PDF文件第4页浏览型号SN74LVC02APWLE的Datasheet PDF文件第5页浏览型号SN74LVC02APWLE的Datasheet PDF文件第6页浏览型号SN74LVC02APWLE的Datasheet PDF文件第7页 
SN54LVC02A, SN74LVC02A  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
www.ti.com  
SCAS280QJANUARY 1993REVISED JULY 2005  
FEATURES  
Operate From 1.65 V to 3.6 V  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Specified From –40°C to 85°C,  
–40°C to 125°C, and –55°C to 125°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.4 ns at 3.3 V  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
– 1000-V Charged-Device Model (C101)xxxxx  
xxxxx  
xxxxx  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
SN54LVC02A . . . J OR W PACKAGE  
SN74LVC02A . . . D, DB, NS, OR PW PACKAGE  
(TOP VIEW)  
SN74LVC02A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVC02A . . . FK PACKAGE  
(TOP VIEW)  
1Y  
1A  
V
CC  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
1
14  
3
2
1 20 19  
18  
4Y  
4B  
4A  
3Y  
3B  
3A  
4B  
NC  
4A  
1B  
NC  
2Y  
4
5
6
7
8
1A  
1B  
2Y  
2A  
2B  
13 4Y  
2
3
4
5
6
1B  
17  
16  
12  
11  
10  
9
4B  
4A  
3Y  
3B  
2Y  
2A  
15 NC  
14  
9 10 11 12 13  
NC  
2A  
2B  
3Y  
8
GND  
7
8
NC - No internal connection  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVC02A quadruple 2-input positive-NOR gate is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVC02A quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation.  
The 'LVC02A devices perform the Boolean function Y = A + B or Y = A B in positive logic.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC02ARGYR  
SN74LVC02AD  
TOP-SIDE MARKING  
LC02A  
–40°C to 85°C  
QFN – RGY  
SOIC – D  
Reel of 1000  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74LVC02ADR  
LVC02A  
SN74LVC02ADT  
SOP – NS  
SN74LVC02ANSR  
SN74LVC02ADBR  
SN74LVC02APW  
SN74LVC02APWR  
SN74LVC02APWT  
SNJ54LVC02AJ  
LVC02A  
LC02A  
–40°C to 125°C  
SSOP – DB  
TSSOP – PW  
LC02A  
CDIP – J  
CFP – W  
LCCC – FK  
SNJ54LVC02AJ  
SNJ54LVC02AW  
SNJ54LVC02AFK  
–55°C to 125°C  
SNJ54LVC02AW  
SNJ54LVC02AFK  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  

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