SN74LV8153

更新时间： 2024-11-23 23:03:19

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
13页	209K
描述
SERIAL-TO-PARALLEL INTERFACE

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中文翻译

获取价格

数据手册

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SN74LV8153 数据手册

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ

ꢀꢊ ꢋꢌꢍ ꢄꢎꢏꢐ ꢎꢑꢍꢋꢍ ꢄꢄ ꢊꢄ ꢌꢁꢏ ꢊꢋ ꢒꢍ ꢓꢊ

www.ti.com

SCLS555 − JUNE 2004

DESCRIPTION

FEATURES

Single-Wire Serial Data Input

The SN74LV8153 is a serial-to-parallel data converter. It

accepts serial input data and outputs 8-bit parallel data.

Compatible With UART Serial-Data Format

Up to Eight Devices (64-Bit Parallel) Can

Share the Same Bus by Using Different

Combinations of A0, A1, A2

The automatic data-rate detection feature of the

SN74LV8153 eliminates the need for an external oscillator

and helps with cost and board real-estate savings.

Up to 40 mA Current Drive in Open-Collector

Mode for Driving LEDs

The OUTSEL pin is used to choose between open

collector and push-pull outputs. The open-collector option

is suitable when this device is used in applications such as

LED interface, where high drive current is required. SOUT

is the output that acknowledges reception of the serial

data.

Outputs Can be Configured as

Open-Collector or Push-Pull

Internal Oscillator and Counter for

Automatic Data-Rate Detection

Output Levels Are Referenced to V

and

CC2

To ensure the high-impedance state during power up or

Can Be Configured From 3 V to 12 V

power down, OE should be tied to V

through a pullup

CC1

Latch-Up Performance Exceeds 250 mA Per

JESD 17

resistor; the minimum value of the resistor is determined

by the current-sinking capability of the driver.

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 1000-V Charged-Device Model (C101)

N OR PW PACKAGE

(TOP VIEW)

19 Y0

SUMMARY OF RECOMMENDED

OPERATING CONDITIONS

CC1

CC2

PARAMETER

17 Y2

16 Y3

15 Y4

14 Y5

3 V to 5.5 V

CC1

OUTSEL

RESET

3 V to 13.2 V

CC2

40 mA @ V

CC2

= 4.5 V

(open-collector mode)

GND

−24 mA @ V = 12 V

SOUT

GND

CC2

(push-pull mode)

Maximum Data Rate

24 Kbps

FUNCTION TABLE

(each buffer)

INPUTS

OUTSEL RESET

OUTPUT

STRUCTURE

Open collector

Push-pull

In the open-collector mode (OUTSEL = L), the outputs are inverted,

e.g., Y1 = l, when D1 = H

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

ꢑꢋ ꢐ ꢔꢕ ꢓ ꢏꢌ ꢐꢁ ꢔ ꢍꢏꢍ ꢖꢗ ꢘꢙ ꢚ ꢛꢜ ꢝꢖꢙꢗ ꢖꢞ ꢟꢠ ꢚ ꢚ ꢡꢗꢝ ꢜꢞ ꢙꢘ ꢢꢠꢣ ꢤꢖꢟ ꢜꢝꢖ ꢙꢗ ꢥꢜ ꢝꢡꢦ ꢑꢚ ꢙꢥꢠ ꢟꢝꢞ

ꢟ ꢙꢗ ꢘꢙꢚ ꢛ ꢝꢙ ꢞ ꢢꢡ ꢟ ꢖ ꢘꢖ ꢟ ꢜ ꢝꢖ ꢙꢗꢞ ꢢ ꢡꢚ ꢝꢧꢡ ꢝꢡ ꢚ ꢛꢞ ꢙꢘ ꢏꢡꢨ ꢜꢞ ꢌꢗꢞ ꢝꢚ ꢠꢛ ꢡꢗꢝ ꢞ ꢞꢝ ꢜꢗꢥ ꢜꢚ ꢥ ꢩ ꢜꢚ ꢚ ꢜ ꢗꢝꢪꢦ

ꢑꢚ ꢙ ꢥꢠꢟ ꢝ ꢖꢙ ꢗ ꢢꢚ ꢙ ꢟ ꢡ ꢞ ꢞ ꢖꢗ ꢫ ꢥꢙ ꢡ ꢞ ꢗꢙꢝ ꢗꢡ ꢟꢡ ꢞꢞ ꢜꢚ ꢖꢤ ꢪ ꢖꢗꢟ ꢤꢠꢥ ꢡ ꢝꢡ ꢞꢝꢖ ꢗꢫ ꢙꢘ ꢜꢤ ꢤ ꢢꢜ ꢚ ꢜꢛ ꢡꢝꢡ ꢚ ꢞꢦ

12 3 4 5 6 7...13

中文翻译

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与SN74LV8153相关器件

型号	品牌	获取价格	描述	数据表
SN74LV8153_08	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153N	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153NE4	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PW	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PWE4	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PWG4	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PWR	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PWRE4	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153PWRG4	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE
SN74LV8153-Q1	TI	获取价格	SERIAL-TO-PARALLEL INTERFACE

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