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SN74LV373ATDWRG4 PDF预览

SN74LV373ATDWRG4

更新时间: 2024-11-21 11:58:23
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
20页 877K
描述
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74LV373ATDWRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.56系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.016 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:15 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

SN74LV373ATDWRG4 数据手册

 浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第2页浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第3页浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第4页浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第5页浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第6页浏览型号SN74LV373ATDWRG4的Datasheet PDF文件第7页 
SN74LV373AT  
OCTAL TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES630BJULY 2005REVISED AUGUST 2005  
FEATURES  
Inputs Are TTL-Voltage Compatible  
4.5-V to 5.5-V VCC Operation  
Typical tpd of 5.1 ns at 5 V  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 5 V, TA = 25°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Typical VOHV (Output VOH Undershoot)  
>2.3 V at VCC = 5 V, TA = 25°C  
Supports Mixed-Mode Voltage Operation on  
All Ports  
– 1000-V Charged-Device Model (C101)  
xxxxxxx  
DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
8Q  
8D  
7D  
7Q  
6Q  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
14 6D  
13 5D  
12 5Q  
11 LE  
GND 10  
10  
11  
DESCRIPTION/ORDERING INFORMATION  
The SN74LV373AT is an octal transparent D-type latch. While the latch-enable (LE) input is high, the Q outputs  
follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D  
inputs.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LV373ATRGYR  
SN74LV373ATDW  
TOP-SIDE MARKING  
VV373  
QFN – RGY  
SOIC – DW  
Reel of 1000  
Tube of 25  
LV373AT  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 70  
SN74LV373ATDWR  
SN74LV373ATNSR  
SN74LV373ATDBR  
SN74LV373ATPW  
SOP – NS  
74LV373AT  
LV373AT  
–40°C to 125°C  
SSOP – DB  
TSSOP – PW  
Reel of 2000  
Reel of 250  
SN74LV373ATPWR  
SN74LV373ATPWT  
LV373AT  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LV373ATDWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV373ATNSRG4 TI

完全替代

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74LV373ATDWR TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74LV373ATDW TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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