5秒后页面跳转
捷配首页

Datasheet > SN74LV126APWLE
SN74LV126APWLE PDF预览

SN74LV126APWLE

更新时间： 2024-11-29 21:08:19
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 121K
描述
LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, PLASTIC, TSSOP-14

阅读下载

中文翻译

获取价格

SN74LV126APWLE 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP14,.25针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.26系列：LV/LV-A/LVX/H
JESD-30 代码：R-PDSO-G14长度：5 mm
逻辑集成电路类型：BUS DRIVER位数：1
功能数量：4端口数量：2
端子数量：14最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP14,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：18.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

SN74LV126APWLE 数据手册

 浏览型号SN74LV126APWLE的Datasheet PDF文件第2页浏览型号SN74LV126APWLE的Datasheet PDF文件第3页浏览型号SN74LV126APWLE的Datasheet PDF文件第4页浏览型号SN74LV126APWLE的Datasheet PDF文件第5页浏览型号SN74LV126APWLE的Datasheet PDF文件第6页浏览型号SN74LV126APWLE的Datasheet PDF文件第7页 
SN54LV126A, SN74LV126A  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCES131D – MARCH 1998 – REVISED MAY 2000  
SN54LV126A . . . J OR W PACKAGE  
SN74LV126A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
1OE  
1A  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
CC  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
4OE  
4A  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
1Y  
A
2OE  
2A  
4Y  
2-V to 5.5-V V  
Operation  
CC  
10 3OE  
Support Mixed-Mode Voltage Operation on  
All Ports  
2Y  
9
8
3A  
3Y  
GND  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
SN54LV126A . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic  
3
2
1
20 19  
18  
Small-Outline (D, NS), Shrink Small-Outline  
(DB), Thin Very Small-Outline (DGV), and  
Thin Shrink Small-Outline (PW) Packages,  
Ceramic Flat (W) Packages, Chip Carriers  
(FK), and DIPs (J)  
4
5
6
7
8
1Y  
NC  
4A  
17  
16  
15  
14  
NC  
4Y  
2OE  
NC  
NC  
3OE  
2A  
9 10 11 12 13  
description  
These quadruple bus buffer gates are designed  
for 2-V to 5.5-V V operation.  
CC  
NC – No internal connection  
The ’LV126A devices feature independent line  
drivers with 3-state outputs. Each output is  
disabled when the associated output-enable (OE)  
input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
The SN54LV126A is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74LV126A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

中文翻译

下载PDF

与SN74LV126APWLE相关器件

型号 品牌 获取价格 描述 数据表
SN74LV126APWR TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV126APWRE4 TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV126APWRG4 TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV126APWT TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV126APWTE4 TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV126APWTG4 TI

获取价格

 		QUADRUPLE BUS BUFFER GATES WITH 3 STATE OUTPUTS
SN74LV132 TI

获取价格

 		QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN74LV132A TI

获取价格

 		QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN74LV132AD TI

获取价格

 		QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN74LV132ADB TI

获取价格

 		QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS

与SN74LV126APWLE相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证