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SN74HC74QDRQ1 PDF预览

SN74HC74QDRQ1

更新时间: 2024-11-04 09:14:19
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 213K
描述
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND

SN74HC74QDRQ1 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:GREEN, PLASTIC, MS-012AB, SOIC-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.64Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:21000000 Hz最大I(ol):0.0052 A
湿度敏感等级:1位数:1
功能数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:2/6 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:50 ns传播延迟(tpd):250 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:FF/Latch
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.91 mm最小 fmax:25 MHz
Base Number Matches:1

SN74HC74QDRQ1 数据手册

 浏览型号SN74HC74QDRQ1的Datasheet PDF文件第2页浏览型号SN74HC74QDRQ1的Datasheet PDF文件第3页浏览型号SN74HC74QDRQ1的Datasheet PDF文件第4页浏览型号SN74HC74QDRQ1的Datasheet PDF文件第5页浏览型号SN74HC74QDRQ1的Datasheet PDF文件第6页浏览型号SN74HC74QDRQ1的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢂꢃ ꢆꢇ ꢈ  
ꢉꢊꢋ ꢌ ꢉꢆꢍ ꢎꢏ ꢐ ꢏꢑ ꢀꢒ ꢍ ꢒꢓꢐ ꢆꢐꢉꢔ ꢐꢆꢍ ꢕꢒ ꢔ ꢔꢐ ꢕꢐꢉ ꢖꢌ ꢒꢏ ꢆ ꢖꢌꢑ ꢏ  
ꢗ ꢒꢍ ꢄ ꢅꢌ ꢐꢋꢕ ꢋꢁꢉ ꢏ ꢕꢐ ꢀ ꢐꢍ  
SCLS577 − MARCH 2004  
D OR PW PACKAGE  
(TOP VIEW)  
D
Qualification in Accordance With  
AEC-Q100  
D
Qualified for Automotive Applications  
1CLR  
1D  
V
CC  
2CLR  
1
2
3
4
5
6
7
14  
13  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
1CLK  
1PRE  
1Q  
12 2D  
11  
10  
9
2CLK  
2PRE  
2Q  
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
1Q  
8
GND  
2Q  
Low Power Consumption, 80-µA Max I  
Typical t = 15 ns  
pd  
4-mA Output Drive at 5 V  
CC  
Low Input Current of 1 µA Max  
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
The SN74HC74 device contains two independent D-type positive-edge-triggered flip-flops. A low level at the  
preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When  
PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred  
to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and  
is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed  
without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Reel of 2500  
Reel of 2000  
SN74HC74QDRQ1  
HC74Q  
HC74Q  
−40°C to 125°C  
TSSOP − PW  
SN74HC74QPWRQ1  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
PRE  
L
CLR  
CLK  
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
H
L
L
X
H
H
H
H
H
H
L
L
H
H
H
L
X
Q
Q
0
0
This configuration is nonstable; that is, it does not  
persist when PRE or CLR returns to its inactive  
(high) level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢍꢣ  
Copyright 2004, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC74QDRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC74QDRG4Q1 TI

完全替代

具有清零和预设功能的汽车类双路 D 类正边沿触发触发器 | D | 14 | -40 to
CD74HC74M96 TI

类似代替

Dual D Flip-Flop with Set and Reset Positive-Edge Trigger

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具有清零和预设功能的汽车类双路 D 类正边沿触发触发器 | PW | 14 | -40 t
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DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND
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SN74HC75N TI

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4-Bit Bistable Latches 16-PDIP -40 to 85
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IC,LATCH,SINGLE,4-BIT,HC-CMOS,SOP,14PIN,PLASTIC
SN74HC77D3 TI

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SN74HC77D3
SN74HC77DR-00 TI

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HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14