生命周期: | Obsolete | 包装说明: | SOP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.82 | 系列: | HC/UH |
JESD-30 代码: | R-PDSO-G16 | 长度: | 9.9 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | D LATCH |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
传播延迟(tpd): | 33 ns | 认证状态: | Not Qualified |
座面最大高度: | 1.75 mm | 最大供电电压 (Vsup): | 6 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
触发器类型: | HIGH LEVEL | 宽度: | 3.9 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74HC75N | TI |
获取价格 |
4-Bit Bistable Latches 16-PDIP -40 to 85 | |
SN74HC76N | TI |
获取价格 |
Dual J-K Flip-Flops with Preset and Clear 16-PDIP -40 to 85 | |
SN74HC77D | TI |
获取价格 |
IC,LATCH,SINGLE,4-BIT,HC-CMOS,SOP,14PIN,PLASTIC | |
SN74HC77D3 | TI |
获取价格 |
SN74HC77D3 | |
SN74HC77DR-00 | TI |
获取价格 |
HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14 | |
SN74HC77N-00 | TI |
获取价格 |
HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP14 | |
SN74HC77N-10 | TI |
获取价格 |
HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP14 | |
SN74HC78D | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,SOP,14PIN,PLASTIC | |
SN74HC78D3 | TI |
获取价格 |
SN74HC78D3 | |
SN74HC78DR-00 | TI |
获取价格 |
HC/UH SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |