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SN74HC163N-00 PDF预览

SN74HC163N-00

更新时间: 2024-11-26 21:05:27
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
29页 1036K
描述
HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16

SN74HC163N-00 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.05其他特性:TCO OUTPUT
计数方向:UP系列:HC/UH
JESD-30 代码:R-PDIP-T16长度:19.305 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):51 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:25 MHz
Base Number Matches:1

SN74HC163N-00 数据手册

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SCLS298D − JANUARY 1996 − REVISED − OCTOBER 2003  
SN54HC163 . . . J OR W PACKAGE  
SN74HC163 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
Low Power Consumption, 80-µA Max I  
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CLR  
CLK  
A
V
CC  
RCO  
Typical t = 14 ns  
pd  
4-mA Output Drive at 5 V  
Q
Q
Q
Q
A
B
C
D
Low Input Current of 1 µA Max  
Internal Look-Ahead for Fast Counting  
Carry Output for n-Bit Cascading  
Synchronous Counting  
B
C
D
ENP  
GND  
ENT  
LOAD  
Synchronously Programmable  
SN54HC163 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
These synchronous, presettable counters feature  
an internal carry look-ahead for application in  
high-speed counting designs. The ’HC163  
devices are 4-bit binary counters. Synchronous  
operation is provided by having all flip-flops  
clocked simultaneously so that the outputs  
change coincident with each other when  
instructed by the count-enable (ENP, ENT) inputs  
and internal gating. This mode of operation  
eliminates the output counting spikes normally  
associated with synchronous (ripple-clock)  
counters. A buffered clock (CLK) input triggers the  
four flip-flops on the rising (positive-going) edge of  
the clock waveform.  
3
2
1
20 19  
18  
A
B
Q
Q
4
5
6
7
8
A
B
17  
16  
15  
14  
NC  
C
NC  
Q
Q
C
D
D
9 10 11 12 13  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC163N  
SN74HC163N  
SN74HC163D  
SN74HC163DR  
SN74HC163DT  
SN74HC163NSR  
SN74HC163DBR  
SN74HC163PW  
SN74HC163PWR  
SN74HC163PWT  
SNJ54HC163J  
HC163  
SOP − NS  
HC163  
HC163  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC163  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC163J  
SNJ54HC163W  
SNJ54HC163FK  
−55°C to 125°C  
SNJ54HC163W  
SNJ54HC163FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢑ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢍ ꢮꢋ ꢕꢐ ꢯ ꢋꢈꢰꢂ ꢈꢂꢉ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢑ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢉ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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