是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DIP, DIP16,.3 | Reach Compliance Code: | not_compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.88 |
JESD-30 代码: | R-XDIP-T16 | 逻辑集成电路类型: | J-K FLIP-FLOP |
功能数量: | 2 | 端子数量: | 16 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
封装主体材料: | CERAMIC | 封装代码: | DIP |
封装等效代码: | DIP16,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 2/6 V | 子类别: | FF/Latches |
表面贴装: | NO | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 触发器类型: | NEGATIVE EDGE |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74HC112N | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | |
SN74HC112N-00 | TI |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 | |
SN74HC112N1 | ROCHESTER |
获取价格 |
J-K Flip-Flop | |
SN74HC112N-10 | TI |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 | |
SN74HC112N3 | TI |
获取价格 |
DUAL J-NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | |
SN74HC112NE4 | TI |
获取价格 |
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP -40 to 85 | |
SN74HC112NP1 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,16PIN,PLASTIC | |
SN74HC112NP3 | TI |
获取价格 |
IC IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,16PIN,PLASTIC, FF/Latch | |
SN74HC114 | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK | |
SN74HC114D-00 | TI |
获取价格 |
HC/UH SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |