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SN74CBT16390DLR PDF预览

SN74CBT16390DLR

更新时间： 2024-12-01 05:17:35
品牌 Logo 应用领域
德州仪器 - TI 解复用器开关逻辑集成电路光电二极管
页数 文件大小 规格书
11页 303K
描述
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH

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中文翻译

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SN74CBT16390DLR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP-56针数：56
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.59Is Samacsys：N
系列：CBT/FST/QS/5C/BJESD-30 代码：R-PDSO-G56
长度：18.415 mm逻辑集成电路类型：MULTIPLEXER AND DEMUX/DECODER
功能数量：16输入次数：1
输出次数：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP56,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V传播延迟（tpd）：0.25 ns
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：Other Logic ICs最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

SN74CBT16390DLR 数据手册

 浏览型号SN74CBT16390DLR的Datasheet PDF文件第2页浏览型号SN74CBT16390DLR的Datasheet PDF文件第3页浏览型号SN74CBT16390DLR的Datasheet PDF文件第4页浏览型号SN74CBT16390DLR的Datasheet PDF文件第5页浏览型号SN74CBT16390DLR的Datasheet PDF文件第6页浏览型号SN74CBT16390DLR的Datasheet PDF文件第7页 
SN74CBT16390  
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH  
SCDS035E – OCTOBER 1997 – REVISED OCTOBER 2000  
DGG, DGV, OR DL PACKAGE  
Member of Texas Instruments’ Widebus  
Family  
(TOP VIEW)  
5-Ω Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
A1  
2B1  
2B2  
A3  
1B1  
1B2  
A2  
1B3  
1B4  
A4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
2
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
3
4
2B3  
2B4  
A5  
5
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
6
1B5  
1B6  
A6  
7
2B5  
2B6  
A7  
2B7  
2B8  
GND  
8
description  
9
1B7  
1B8  
A8  
10  
11  
12  
13  
14  
15  
16  
The SN74CBT16390 is a 16-bit to 32-bit switch  
used in applications in which two separate data  
paths must be multiplexed onto, or demultiplexed  
from, a single path. This device can be used for  
memory interleaving, in which two different banks  
of memory must be addressed simultaneously.  
This device also can be used to connect or isolate  
the PCI bus to one or two slots simultaneously.  
GND  
V
V
CC  
CC  
A9  
2B9  
1B9  
1B10  
2B10 17  
A11 18  
40 A10  
39 1B11  
38 1B12  
37 A12  
36 1B13  
Two output enables (OE1 and OE2) control the  
data flow. When OE1 is low, A port is connected  
to 1B port. When OE2 is low, A port is connected  
to 2B port. When both OE1 and OE2 are low, the  
A port is connected to both 1B and 2B ports. The  
control inputs can be driven with a 5-V CMOS,  
5-V TTL, or an LVTTL driver.  
2B11 19  
2B12 20  
A13 21  
22  
23  
24  
25  
26  
27  
28  
35  
34  
33  
32  
31  
30  
29  
2B13  
2B14  
A15  
1B14  
A14  
1B15  
1B16  
A16  
2B15  
2B16  
NC  
OE1  
OE2  
NC  
NC – No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74CBT16390DL  
SSOP – DL  
CBT16390  
Tape and reel  
SN74CBT16390DLR  
SN74CBT16390DGGR  
SN74CBT16390DGVR  
–40°C to 85°C  
TSSOP – DGG Tape and reel  
TVSOP – DGV Tape and reel  
CBT16390  
CY390  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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