ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢇꢇꢄ
ꢊ ꢃ ꢋꢅꢌ ꢆ ꢍ ꢎꢆ ꢅꢏꢀ ꢀꢐ ꢌ ꢆꢄ ꢑ ꢐ ꢌꢆ ꢑ ꢒꢓꢎ ꢄꢑꢔꢓ ꢕꢎ ꢖ ꢗ ꢏꢆ ꢒ ꢏꢆꢀ
ꢘ ꢋꢙ ꢅꢏꢀ ꢀꢐ ꢌ ꢆꢄ ꢑ ꢐ ꢌꢆ ꢑ ꢚ ꢊ ꢋꢙ ꢏꢁꢖ ꢎꢓꢀꢑ ꢗꢗ ꢆ ꢒꢓ ꢗ ꢆꢎ ꢄꢆ ꢌꢗ ꢁ
SCDS118C − JANUARY 2003 − REVISED OCTOBER 2003
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
D
D
D
Member of the Texas Instruments
Widebus Family
Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
BIASV
1A1
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
1B11
1B12
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
2
3
B-Port Outputs Are Precharged by Bias
Voltage (BIASV) to Minimize Signal
Distortion During Live Insertion and
Hot-Plugging
1A2
4
1A3
5
1A4
6
1A5
7
1A6
D
D
D
D
Supports PCI Hot Plug
8
GND
1A7
Bidirectional Data Flow, With Near-Zero
Propagation Delay
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1A8
1A9
1A10
1A11
1A12
2A1
Low ON-State Resistance (r
)
on
Characteristics (r = 3 Ω Typical)
on
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
= 5.5 pF Typical)
io(OFF)
D
D
Data and Control Inputs Provide
Undershoot Clamp Diodes
2A2
V
CC
Low Power Consumption
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
(I
= 3 µA Max)
CC
D
V
Operating Range From 4 V to 5.5 V
CC
D
Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
D
D
D
D
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
I
Supports Partial-Power-Down Mode
off
2A10
2A11
2A12
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D
Supports Both Digital and Analog
Applications: PCI Interface, Memory
Interleaving, Bus Isolation, Low-Distortion
Signal Gating
description/ordering information
The SN74CBT16811C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ),
on
allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the
SN74CBT16811C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring
that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias
voltage (BIASV) to minimize live-insertion noise.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
ꢒ
ꢒ
ꢓ
ꢗ
ꢪ
ꢖ
ꢥ
ꢏ
ꢄ
ꢣ
ꢆ
ꢤ
ꢌ
ꢞ
ꢗ
ꢜ
ꢁ
ꢝ
ꢖ
ꢔ
ꢆ
ꢔ
ꢛ
ꢜ
ꢦ
ꢝ
ꢞ
ꢤ
ꢟ
ꢠ
ꢡ
ꢡ
ꢢ
ꢢ
ꢛ
ꢛ
ꢞ
ꢞ
ꢜ
ꢜ
ꢛ
ꢣ
ꢣ
ꢧ
ꢤ
ꢥ
ꢟ
ꢟ
ꢦ
ꢦ
ꢜ
ꢢ
ꢡ
ꢠ
ꢣ
ꢣ
ꢞ
ꢝ
ꢧ
ꢆꢦ
ꢥ
ꢨ
ꢣ
ꢩ
ꢛ
ꢤ
ꢡ
ꢣ
ꢢ
ꢛ
ꢢ
ꢞ
ꢟ
ꢜ
ꢥ
ꢪ
ꢡ
ꢜ
ꢢ
ꢢ
ꢦ
ꢣ
ꢫ
Copyright 2003, Texas Instruments Incorporated
ꢟ
ꢞ
ꢤ
ꢢ
ꢞ
ꢟ
ꢠ
ꢢ
ꢞ
ꢣ
ꢧ
ꢛ
ꢝ
ꢛ
ꢤ
ꢦ
ꢟ
ꢢ
ꢬ
ꢢ
ꢦ
ꢟ
ꢞ
ꢝ
ꢭ
ꢡ
ꢌ
ꢜ
ꢠ
ꢦ
ꢣ
ꢢ
ꢡ
ꢜ
ꢪ
ꢡ
ꢟ
ꢪ
ꢮ
ꢡ
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ
ꢟ
ꢟ
ꢡ
ꢜ
ꢢ
ꢯ
ꢫ
ꢒ
ꢟ
ꢞ
ꢪ
ꢥ
ꢤ
ꢢ
ꢛ
ꢞ
ꢜ
ꢧ
ꢟ
ꢞ
ꢤ
ꢦ
ꢣ
ꢣ
ꢛ
ꢜ
ꢰ
ꢪ
ꢞ
ꢦ
ꢣ
ꢜ
ꢞ
ꢢ
ꢜ
ꢦ
ꢤ
ꢦ
ꢣ
ꢣ
ꢡ
ꢟ
ꢛ
ꢩ
ꢯ
ꢛ
ꢜ
ꢤ
ꢩ
ꢥ
ꢪ
ꢦ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265