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SN74BCT29826

更新时间： 2024-11-14 12:22:31
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
7页 112K
描述
8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN74BCT29826 数据手册

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SCBS076A − NOVEMBER 1991 − REVISED NOVEMBER 1993  
SN54BCT29826 . . . JT OR W PACKAGE  
SN74BCT29826 . . . DW OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
OE1  
OE2  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
OE3  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
• 3-State Inverting Buffer-Type Outputs Drive  
Bus Lines Directly  
• Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic Chip  
Carriers (FK) and Flatpacks (W), and  
Standard Plastic and Ceramic 300-mil DIPs  
(JT, NT)  
8D 10  
15 8Q  
CLR  
GND  
CLKEN  
CLK  
11  
12  
14  
13  
description  
These 8-bit bus-interface flip-flops feature 3-state  
outputs designed specifically for driving highly  
capacitive or relatively low-impedance loads.  
They are particularly suitable for implementing  
wider buffer registers, I/O ports, bidirectional bus  
drivers with parity, and working registers.  
SN54BCT29826 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2
1 28 27 26  
25  
5
6
7
8
9
The eight flip-flops are edge-triggered D-type  
flip-flops. With the clock-enable (CLKEN) input  
low, the device enters data on the low-to-high  
transition of the clock. Taking CLKEN high  
disables the clock buffer, thus latching the outputs.  
Taking the clear (CLR) input low causes the eight  
Q outputs to go low independently of the clock.  
2Q  
3Q  
4Q  
2D  
3D  
4D  
NC  
5D  
6D  
7D  
24  
23  
22 NC  
21 5Q  
20 6Q  
19 7Q  
10  
11  
12 13 14 15 16 17 18  
Buffered output-enable (OE1, OE2, or OE3)  
inputs can be used to place the eight outputs in  
either a normal logic state (high or low) or a  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
NC − No internal connection  
The output-enable inputs do not affect the internal  
operation of the flip-flops. Old data can be retained  
or new data can be entered while the outputs are  
in the high-impedance state.  
The SN54BCT29826 is characterized for opera-  
tion over the full military temperature range of  
−55°C to 125°C. The SN74BCT29826 is  
characterized for operation from 0°C to 70°C.  
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Copyright 1993, Texas Instruments Incorporated  
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ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
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2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567

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与SN74BCT29826相关器件

型号 品牌 获取价格 描述 数据表
SN74BCT29826DW TI

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 		Octal Bus Interface Flip-Flops 24-SOIC 0 to 70
SN74BCT29826DWR TI

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 		Octal Bus Interface Flip-Flops 0-SOIC 0 to 70
SN74BCT29826NT TI

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 		Octal Bus Interface Flip-Flops 24-PDIP 0 to 70
SN74BCT29827ADW TI

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 		10-Bit Buffers/Drivers With 3-State Outputs 24-SOIC 0 to 70
SN74BCT29827ADW-00 TI

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 		BCT/FBT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24
SN74BCT29827ADWR TI

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 		BCT/FBT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24
SN74BCT29827AFN TI

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 		BCT/FBT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PQCC28
SN74BCT29827ANT TI

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 		暂无描述
SN74BCT29827ANT-10 TI

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 		BCT/FBT SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDIP24
SN74BCT29827B TI

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 		10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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