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SN74AXC8T245RHL-Q1

更新时间： 2024-11-24 02:50:59
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SN74AXC8T245-Q1 Automotive 8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs

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 浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第2页浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第3页浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第4页浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第5页浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第6页浏览型号SN74AXC8T245RHL-Q1的Datasheet PDF文件第7页 
SN74AXC8T245-Q1  
SCES892C – NOVEMBER 2018 – REVISED OCTOBER 2021  
SN74AXC8T245-Q1 Automotive 8-Bit Dual-Supply Bus Transceiver With Configurable  
Voltage Translation and Tri-State Outputs  
The SN74AXC8T245-Q1 device is designed for  
asynchronous communication between data buses.  
1 Features  
•
•
•
AEC-Q100 qualified for automotive applications  
Available in wettable flank QFN (WRGY) package  
Qualified fully configurable dual-rail design allows  
each port to operate with a power supply range  
from 0.65 V to 3.6 V  
The device transmits data from the A bus to the B bus  
or from the B bus to the A bus, depending on the logic  
level of the direction-control inputs (DIR1 and DIR2).  
The output-enable (OE) input is used to disable the  
outputs so the buses are effectively isolated.  
•
•
Operating temperature from –40°C to +125°C  
Multiple direction-control pins to allow  
simultaneous up and down translation  
Up to 380 Mbps support when translating from 1.8  
V to 3.3 V  
VCC isolation feature to effectively Isolate both  
bses in a power-down scenario  
Partial power-down mode to limit backflow current  
in a power-down scenario  
The SN74AXC8T245-Q1 device is designed so the  
control pins (DIR and OE) are referenced to VCCA  
.
•
•
•
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables  
the outputs when the device is powered down.  
This inhibits current backflow into the device which  
prevents damage to the device.  
The VCC isolation feature ensures that if either VCC  
input supply is below 100 mV, all level shifter outputs  
are disabled and placed into a high-impedance state.  
•
•
Compatible with SN74AVC8T245-Q1 level shifter  
Latch-up performance exceeds 100 mA per JESD  
78, class II  
To ensure the high-impedance state of the level shifter  
I/Os during power up or power down, OE should be  
tied to VCCA through a pullup resistor; the minimum  
value of the resistor is determined by the current-  
sinking capability of the driver.  
2 Applications  
•
•
•
•
Infotainment head unit  
ADAS fusion  
ADAS front camera  
HEV battery management system  
Device Information  
3 Description  
PART NUMBER(1)  
SN74AXC8T245PW-Q1  
SN74AXC8T245RHL-Q1  
PACKAGE  
BODY SIZE (NOM)  
TSSOP (24) 4.40 mm × 7.80 mm  
The SN74AXC8T245-Q1 AEC-Q100 qualified device  
is an 8-bit non-inverting bus transceiver that resolves  
voltage level mismatch between devices operating at  
the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and  
devices operating at industry standard voltage nodes  
(1.8 V, 2.5 V, and 3.3 V) and vice versa.  
VQFN (24)  
3.50 mm × 5.50 mm  
3.50 mm × 5.50 mm  
SN74AXC8T245WRGY-Q1 VQFN (24)  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
3.3 V  
1.5 V  
The device operates by using two independent power-  
supply rails (VCCA and VCCB) that operate as low as  
0.65 V. Data pins A1 through A8 are designed to track  
VCCA, which accepts any supply voltage from 0.65 V  
to 3.6 V. Data pins B1 through B8 are designed to  
track VCCB, which accepts any supply voltage from  
0.65 V to 3.6 V.  
Processor  
VCCA DIR1 DIR2  
VCCB  
B1  
Power Management  
A1  
A2  
A3  
A4  
Control Block  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
SN74AXC8T245-Q1  
Data Block  
Interrupts  
Register Map  
Sensor Block  
A5  
A6  
A7  
A8  
GND  
GND  
Typical Application Schematic  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
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