Datasheet > SN74AXCH2T45DTMR

SN74AXCH2T45DTMR

更新时间： 2024-11-27 11:13:47

品牌	Logo	应用领域
德州仪器 - TI		总线收发器
页数	文件大小	规格书
41页	938K
描述
具有总线保持电流的 2 位 0.65V 至 3.6V AXC 双电源总线收发器 \| DTM \| 8 \| -40 to 125

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SN74AXCH2T45

SCES881 –FEBRUARY 2020

SN74AXCH2T45 2-Bit Bus Transceiver with Configurable Level-Shifting

and Bus-Hold Inputs

Active bus-hold circuitry holds unused or undriven

inputs at a valid logic state. Use of pullup or pulldown

resistors with the bus-hold circuitry is not

recommended. If a supply is present for VCCA or

VCCB, the bus-hold circuitry always remains active

on the A or B inputs respectively, independent of the

state of the direction control pin.

1 Features

•

Fully configurable dual-rail design allows each

port to operate with a power supply range from

0.65 V to 3.6 V

•

Operating temperature from –40°C to +125°C

Glitch-free power supply sequencing

This device is fully specified for partial-power-down

applications using the I_offcurrent. The I_offprotection

circuitry ensures that no excessive current is drawn

from or to an input, output, or combined I/O that is

biased to a specific voltage while the device is

powered down.

Up to 380 Mbps support when translating from 1.8

V to 3.3 V

•

V_CCisolation feature

–

If either V_CCinput is below 100 mV, all I/O

outputs are disabled and become high

impedance

The V_CCisolation feature ensures that if either V_CCA

or V_CCBis less than 100 mV, both I/O ports enter a

high-impedance state by disabling their outputs.

•

I_offsupports partial-power-down mode operation

Compatible with AVC family level shifters

Latch-up performance exceeds 100 mA per JESD

78, Class II

Glitch-free power supply sequencing allows either

supply rail to be powered on or off in any order while

providing robust power sequencing performance.

•

ESD protection exceeds JESD 22

–

8000-V human-body model (HBM)

1000-V charged-device model (CDM)

Device Information⁽¹⁾

PART NUMBER

SN74AXCH2T45DCU

SN74AXCH2T45DTM

PACKAGE

VSSOP (8)

X2SON (8)

BODY SIZE (NOM)

2.30 mm × 2.00 mm

1.35 mm x 0.80 mm

2 Applications

•

Enterprise and communications

Industrial

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Personal electronics

Wireless infrastructure

Building automation

Point of sale

Logic Diagram (Positive Logic)

V_CCA

V_CCB

DIR

3 Description

The SN74AXCH2T45 is a two-bit non-inverting bus

transceiver that uses two individually configurable

power-supply rails. The device is operational with

both V_CCAand V_CCBsupplies as low as 0.65 V. The A

port is designed to track V_CCA, which accepts any

supply voltage from 0.65 V to 3.6 V. The B port is

designed to track V_CCB, which also accepts any

supply voltage from 0.65 V to 3.6 V. Additionally the

SN74AXCH2T45 is compatible with a single-supply

system.

Bus-Hold

Note: Bus-hold circuits are only present for data inputs, not control inputs

The SN74AXCH2T45 device is designed for

asynchronous communication between data buses.

The device transmits data from the A bus to the B

bus or from the B bus to the A bus, depending on the

logic level of the direction-control input (DIR). The

SN74AXCH2T45 device is designed so the control

pin (DIR) is referenced to V_CCA

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

12 3 4 5 6 7...41

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